CP3SP33SMSSLASHNOPB datasheet(135/407 Pages) TI1

135 / 407 page

CP3SP33

www.ti.com

SNOSCW5 – MAY 2013

ADC2STATUS

The ADC2 Status bit indicates whether ADC2 is enabled. If ADC2 is enabled, its clock

must not be disabled.

0 – ADC2 disabled.

1 – ADC2 enabled.

20.10.4 Codec DSP Set-Up Register (TCDCDSP)

The TCDCDSP register is a 16-bit, read/write register that configures some of the DSP portions of the

module. After reset, this register is cleared to 0000h.

CUST

ADC2

ADC1

DAC

Reserved

STCLPR

STCLPL

SIDETONEATTEN

CLKPH

DIGMICGAIN

COMP

DITOFF DITOFF DITOFF

DITON

DACDITON

The DAC Dither On bit enables dithering the output, without regard to the audio

content.

0 – Dithering may be on or off.

1 – Dithering always on.

DACDITOFF

The DAC Dither Off bit disables dithering the output, without regard to the audio

content. If set, this bit overrides the DACDITON bit.

0 – Dithering may be on or off.

1 – Dithering always off.

ADC1DITON

The ADC1 Dither Off bit disables dithering the ADC1 ASDM input.

0 – Dithering may be on or off.

1 – Dithering always off.

ADC2DITON

The ADC2 Dither Off bit disables dithering the ADC2 ASDM input.

0 – Dithering may be on or off.

1 – Dithering always off.

CUSTCOMP

The CUSTCOMP bit selects between default compensation filter coefficients and

custom values in the TCDCCOMP0, TCDCCOMP1, and TCDCCOMP2 registers.

Default values vary with the over-sampling rate to keep the reconstruction filter output

flat up to 20kHz.

0 – Default coefficients are used.

1 – Custom coefficients are used.

DIGMICGAIN

The DIGMICGAIN field selects a scaling factor for the DIGMIC1 input data. It can be

used to provide extra gain for small analog signals when the microphone pre-amplifier

gain is not sufficient. It is controllable in 2 dB steps between 0 dB and 14 dB.

DIGMICGAIN FIELD

GAIN (db)

000

001

010

011

100

101

110

111

Telematics Codec

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