CP3SP33SMSSLASHNOPB datasheet(147/407 Pages) TI1

147 / 407 page

VBUS

USB

Connector

UGND

DS342

D+

D-

CP3SP33

www.ti.com

SNOSCW5 – MAY 2013

•

Peripheral Mode—the USB controller encodes, decodes, checks, and directs all USB packets sent and

received. IN transactions are handled through the device’s Tx FIFOs, and OUT transactions are

handled through its Rx FIFOs. If a FIFO becomes full during an OUT transaction or empty during an IN

transaction, a NAK handshake packet is automatically returned to the host. A NAK packet is also

returned for any endpoint that has interrupts disabled. Peripheral mode is used when the device is

acting as a peripheral to a standard USB host or as a peripheral in point-to-point communications.

Control, Bulk, Isochronous, and Interrupt transactions are supported.

•

Host Mode—the USB controller acts as the host in point-to-point communication with another USB

device. In this mode, it can communicate with another device (but not a hub), that supports Control,

Bulk, Isochronous, or Interrupt transactions. IN transactions are handled through the Rx FIFOs, and

OUT transactions are handled through the Tx FIFOs. As well as encoding, decoding, and checking the

USB packets being sent and received, the USB controller automatically schedules Isochronous

endpoints and Interrupt endpoints to perform one transaction every n frames, in which n represents the

polling interval that has been programmed for the endpoint. The remaining bus bandwidth is shared

equally among the Control and Bulk endpoints. Only one downstream device can be supported in Host

mode.

21.2 USB Connector Interface

21.2.1 USB 2.0

A full-speed USB 2.0 interface requires 22

Ω series resistors on the D+ and D– data signals, to meet the

impedance specification for these signals, as shown in Figure 21-2.

Figure 21-2. USB 2.0 Connector Interface

21.2.2 USB On-The-Go

Additional signals are used to implement USB On-The-Go features, as shown in Figure 21-3.

USB Controller

147

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