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RPC56EL60L5BFSR bảng dữ liệu(PDF) 87 Page - STMicroelectronics |
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RPC56EL60L5BFSR bảng dữ liệu(HTML) 87 Page - STMicroelectronics |
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87 / 137 page ![]() DocID026934 Rev 1 87/137 RPC56EL60L5 Electrical characteristics 136 3.4.1 General notes for specifications at maximum junction temperature An estimation of the chip junction temperature, TJ, can be obtained from Equation 1: Equation 1: TJ = TA + (RJA × PD) where: TA= ambient temperature for the package ( oC) RJA= junction to ambient thermal resistance ( oC/W) PD= power dissipation in the package (W) The junction to ambient thermal resistance is an industry standard value that provides a quick and easy estimation of thermal performance. Unfortunately, there are two values in 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2. Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets JEDEC specification for this package. 3. Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for the specified package. 4. Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer. 5. Thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT. Table 11. Thermal characteristics for LFBGA257 package(1) Symbol Parameter Conditions Value Unit RJA D Thermal resistance junction-to-ambient natural convection(2) Single layer board – 1s 46 °C/ W Four layer board – 2s2p 26 RJMA D Thermal resistance, junction-to-ambient forced convection at 200 ft/min Single layer board – 1s 37 °C/ W Four layer board – 2s2p 22 RJB D Thermal resistance junction-to-board(3) —13 °C/ W RJC D Thermal resistance junction-to-case(4) —8 °C/ W JT D Junction-to-package-top natural convection(5) —2 °C/ W 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2. Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets JEDEC specification for this package. 3. Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for the specified package. 4. Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer. 5. Thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT. |
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