PCM3168APAPR datasheet(9/66 Pages) TI1

9 / 66 page

PCM3168A

www.ti.com

SBAS452A – SEPTEMBER 2008 – REVISED JANUARY 2016

8.5 Electrical Characteristics

At TA = 25°C, VCCAD1 = VCCAD2 = VCCDA1 = VCCDA2 = 5 V, VDD1 = VDD2 = 3.3 V, fS = 48 kHz, SCKI = 512 fS, 24-bit

data, Sampling Mode = Auto for ADC and DAC, and Interface Mode = Slave for ADC and DAC, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DATA FORMAT

Audio data interface format

I2S, LJ, RJ, DSP, TDM

Audio data word length

16, 24

Bits

Audio data format

MSB first, twos complement

Sampling frequency, ADC

kHz

Sampling frequency, DAC

192

kHz

128 fS, 192 fS, 256 fS,

System clock frequency

2.048

36.864

MHz

384 fS, 512 fS, 768 fS

INPUT LOGIC

VIH

(1) (2)

VDD

Input logic level

VDC

VIL

(1) (2)

0.8

VIH

(3) (4)

5.5

Input logic level

VDC

VIL

(3) (4)

0.8

IIH

(2) (3)

VIN = VDD

±10

Input logic level

μA

IIL

(2) (3)

VIN = 0 V

±10

IIH

(1) (4)

VIN = VDD

100

Input logic level

μA

IIL

(1) (4)

VIN = 0 V

±10

OUTPUT LOGIC

VOH

(5)

IOUT = –4 mA

2.4

Output logic level

VDC

VOL

(5) (6)

IOUT = 4 mA

0.4

REFERENCE INPUT/OUTPUT

VREFAD1 output voltage

VCCAD1

VREFAD2 output voltage

AGNDAD1

VCOMAD output voltage

0.5 × VCCAD1

VCOMAD output impedance

Ω

Allowable VCOMAD output

μA

source/sink current

VCOMDA output voltage

0.5 × VCCDA1

VCOMDA output impedance

7.5

Ω

Allowable VCOMDA output

μA

source/sink current

ADC CHARACTERISTICS

Resolution

Bits

VIN = 0 dB, Single-ended

0.2 × VCCAD1

VRMS

Full-scale input voltage

VIN = 0 dB, Differential

0.4 × VCCAD1

VRMS

Center voltage

0.5 × VCCAD1

Input impedance

Ω

Common-mode rejection ratio

DC ACCURACY

Gain mismatch channel-to-channel

Full-scale input, VIN

±2.0

±6

% of FSR

Gain error

Full-scale input, VIN

±2.0

±6

% of FSR

Bipolar zero error

Highpass filter bypass, VIN

±1.0

% of FSR

(1)

BCKAD, BCKDA, LRCKAD, and LRCKDA (in slave mode, Schmitt trigger input with 50-k

Ω typical internal pulldown resistor).

(2)

DIN1/2/3/4 and MDO/ADR1/MD1. (Except SPI mode, Schmitt trigger input).

(3)

SCKI, MDI/SDA/DEMP, and MC/SCL/FMT (Schmitt trigger input, 5-V tolerant).

(4)

RST and MS/ADR0/MD0 (Schmitt trigger input with 50-k

Ω typical internal pulldown resistor, 5-V tolerant).

(5)

BCKAD, BCKDA, LRCKAD, and LRCKDA (in master mode), DOUT1/2/3, ZERO, OVF, and MDO/ADR1/MD1 (in SPI mode).

(6)

SDA (in I2C mode, open-drain low output).

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