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DIX4192IPFB bảng dữ liệu(PDF) 39 Page - Texas Instruments

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tên linh kiện DIX4192IPFB
Giải thích chi tiết về linh kiện  Integrated Digital Audio Interface Receiver and Transmitter
PDF  69 Pages
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Trang chủ  http://www.ti.com
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DIX4192IPFB bảng dữ liệu(HTML) 39 Page - Texas Instruments

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DIX4192
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SBFS031D – JANUARY 2006 – REVISED JANUARY 2016
Figure 45. Register 16: Receiver Interrupt Mask Register 1
7 (MSB)
6
5
4
3
2
1
0 (LSB)
MCSCRC
MPARITY
MVBIT
MBPERR
MQCHG
MUNLOCK
MQCRC
MRBTI
Table 24. Register 16: Receiver Interrupt Mask Register 1 Field Descriptions
MCSCRC
Channel Status CRC Error Interrupt Mask
MCSCRC
CRC Interrupt
0
Masked (default)
1
Enabled
MPARITY
Parity Error Interrupt Mask
MPARITY
Parity Error Interrupt
0
Masked (default)
1
Enabled
MVBIT
Validity Error Interrupt Mask
MVBIT
Validity Error Interrupt
0
Masked (default)
1
Enabled
MBPERR
Biphase Encoding Error Interrupt Mask
MBPERR
Biphase Error Interrupt
0
Masked (default)
1
Enabled
MQCHG
Q-Channel Sub-Code Data Change Interrupt Mask
MQCHG
Q-Channel Data Change Interrupt
0
Masked (default)
1
Enabled
MUNLOCK
DIR Unlock Error Interrupt Mask
MUNLOCK
DIR Unlock Interrupt
0
Masked (default)
1
Enabled
MQCRC
Q-Channel Sub-Code CRC Error Interrupt Mask
MQCRC
Q-Channel CRC Error Interrupt
0
Masked (default)
1
Enabled
MRBTI
Receiver Buffer Transfer Interrupt Mask
MRBTI
Receiver Buffer Transfer Interrupt
0
Masked (default)
1
Enabled
Figure 46. Register 17: Receiver Interrupt Mask Register 2
7 (MSB)
6
5
4
3
2
1
0 (LSB)
0
0
0
0
0
0
0
MOSLIP
Table 25. Register 17: Receiver Interrupt Mask Register 2 Field Descriptions
MOSLIP
Receiver Output Data Slip Error Mask
MOSLIP
Receiver OSLIP Error Interrupt
0
Masked (default)
1
Enabled
Copyright © 2006–2016, Texas Instruments Incorporated
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