ZL6105ALAF datasheet(14/35 Pages) INTERSIL

14 / 35 page

ZL6105

FN6906.5

December 19, 2013

Soft-Start Delay and Ramp Times

It may be necessary to set a delay from when an enable signal is

received until the output voltage starts to ramp to its target

value. In addition, the designer may wish to precisely set the time

required for VOUT to ramp to its target value after the delay period

has expired. These features may be used as part of an overall

inrush current management strategy or to precisely control how

fast a load IC is turned on. The ZL6105 gives the system designer

several options for precisely and independently controlling both

the delay and ramp time periods.

The soft-start delay period begins when the EN pin is asserted

and ends when the delay time expires. The soft-start delay period

is set using the SS pin.

The soft-start ramp timer enables a precisely controlled ramp to

the nominal VOUT value that begins once the delay period has

expired. The ramp-up is guaranteed monotonic and its slope may

be precisely set using the SS pin.

The soft start delay and ramp times can be set to standard

values according to Table 6.

If the desired soft-start delay and ramp times are not one of the values

listed in Table 6, the times can be set to a custom value by connecting a

resistor from the SS pin to SGND using the appropriate resistor value

from Table 7. The value of this resistor is measured upon start-up or

Restore and will not change if the resistor is varied after power has been

applied to the ZL6105.

The soft-start delay and ramp times can also be set to custom

values via the I2C/SMBus interface. When the SS delay time is

set to 0ms, the device will begin its ramp-up after the internal

circuitry has initialized (approximately 2ms). When the soft-start

ramp period is set to 0ms, the output will ramp up as quickly as

the output load capacitance and loop settings will allow. It is

generally recommended to set the soft-start ramp to a value

greater than 500µs to prevent inadvertent fault conditions due to

excessive in-rush current.

The ZL6105 has a minimum TON_DELAY requirement that is a

function of the operating mode. Table 8 shows the different

mode configurations and the minimum TON_DELAY required for

each mode. Current sharing is configured with the

ISHARE_CONFIG PMBus command, Auto compensation is

configured with the AUTO_COMP_CONFIG command, and

Standby Mode is configured as Low Power with the

USER_CONFIG command. See Application Note AN2033 for

details.

TABLE 5. ZL6105 START-UP SEQUENCE

STEP #

STEP NAME

DESCRIPTION

TIME DURATION

Power Applied

Input voltage is applied to the ZL6105’s VDD pin

Depends on input supply ramp

time

Internal Memory Check

The device will check for values stored in its internal memory. This step

is also performed after a Restore command.

Approximately 5ms to 10ms

(device will ignore an enable

signal or PMBus traffic during this

period)

Multi-mode Pin Check

The device loads values configured by the multi-mode pins.

Device Ready

The device is ready to accept an enable signal.

−

Pre-ramp Delay

The device requires a minimum delay period following an enable signal

and prior to ramping its output, as described in “Soft-Start Delay and

Ramp Times” on page 14.

−

TABLE 6. SOFT-START PIN-STRAP SETTINGS

SS PIN

DELAY TIME

(ms)

RAMP TIME

(ms)

LOW

OPEN

HIGH

TABLE 7. SS RESISTOR SETTINGS

RSS

Ω)

DELAY TIME

(ms)

RAMP TIME

(ms)

13.3

14.7

16.2

17.8

19.6

21.5

23.7

26.1

28.7

31.6

34.8

38.3

42.2

46.4

51.1

56.2

61.9

68.1

82.5

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