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FT232H bảng dữ liệu(PDF) 39 Page - Future Technology Devices International Ltd. |
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FT232H bảng dữ liệu(HTML) 39 Page - Future Technology Devices International Ltd. |
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39 / 65 page ![]() Copyright © 2014 Future Technology Devices International Limited 39 Document No.: FT_000288 FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 1.81 Clearance No.: FTDI #199 4.9.1 Outgoing Fast Serial Data To send fast serial data out of the FT232H, the external device must drive the FSCLK clock. If the FT232H has data ready to send, it will drive FSDO output low to indicate the start bit. It will not do this if it is currently receiving data from the external device. This is illustrated in Figure 4.18 Figure 4.18 Fast Serial Interface Output Data Notes :- 1. The first bit output (Start bit) is always 0. 2. FSDO is always sent LSB first. 3. The last serial bit output is the source bit (SRCE) is always 0. 4. If the target device is unable to accept the data when it detects the START bit, it should stop the FSCLK until it can accept the data. 4.9.2 Incoming Fast Serial Data An external device is allowed to send data into the FT232H if FSCTS is high. On receipt of a zero START bit on FSDI, the FT232H will drop FSCTS on the next positive clock edge. The data from bits 0 to 7 are then clocked in (LSB first). The last bit (DEST) determines where the data will be written to. This bit is always 0 with the FT232H. This is illustrated in Figure 4.19 Figure 4.19 Fast Serial Interface Input Data Notes:- 1. The first bit input (Start bit) is always 0. 2. FSDI is always received LSB first. 3. The last received serial bit is the destination bit (DEST) is always 0. 4. The target device should ensure that FSCTS is high before it sends data. FSCTS goes low after data bit 0 (D0) and stays low until the chip can accept more data. FSCLK FSDO 0 D0 D1 D2 D3 D4 D5 D6 D7 SRCE Start Bit Data Bits - LSB first Source Bit FSCLK FSDI 0 D0 D1 D2 D3 D4 D5 D6 D7 DEST Start Bit Data Bits - LSB first Destination Bit FSCTS |
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