AN4651 datasheet(30/34 Pages) STMICROELECTRONICS

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Interconnection descriptions

AN4651

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DocID027426 Rev 1

3.21

From ADC to HRTIM1

ADCx (x=1, 2) provides the trigger event through watchdog signals to the high resolution

timer HRTIM1.

3.22

From system faults to HRTIM1

The HRTIM1 system fault input (SYSFLT) gathers MCU internal fault events coming from:



the clock failure event generated by the clock security system (CSS),



the PVD output,



the SRAM parity error signal,



the Cortex-M4 LOCKUP (Hardfault) output.

3.23

From COMP to HRTIM1

The comparator output can be redirected internally to HRTIM1 inputs.

The comparator outputs are connected directly to HRTIM1 in order to speed-up the

propagation delay.

Table 16. HRTIM1_EEx connection to ADC analog watchdogs

Feature

HRTIM1 event

ADC1

ADC1_AWD1

HRTIM1_EEV1

ADC1_AWD2

HRTIM1_EEV2

ADC1_AWD3

HRTIM1_EEV3

ADC2

ADC2_AWD1

HRTIM1_EEV4

ADC2_AWD2

HRTIM1_EEV5

ADC2_AWD3

HRTIM1_EEV6

Table 17. Comparator outputs to HRTIM1 inputs

COMP#

Internal events

COMP2

HRTIM1_EEV1

HRTIM1_EEV6

HRTIM1_FLT1

COMP4

HRTIM1_EEV2

HRTIM1_EEV7

HRTIM1_FLT2

COMP6

HRTIM1_EEV3

HRTIM1_EEV8

HRTIM1_FLT3

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