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UM0843 bảng dữ liệu(PDF) 20 Page - STMicroelectronics

tên linh kiện UM0843
Giải thích chi tiết về linh kiện  EVALSPEAr310 - evaluation board for the SPEAr310
PDF  48 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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UM0843 bảng dữ liệu(HTML) 20 Page - STMicroelectronics

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Block descriptions
UM0843
20/48
Doc ID16543 Rev 2
6.7
General purpose ADC connector
Eight analog input lines are available on J27 connector. Inside the connector it is also
possible to determine the range of the conversion by setting the conversion limits on the pin
J27-19 (lower limit) and J27-1 (upper limit) via jumpers.
By default the on-board VREFP and VREFN jumper configuration of ADC is selected as
shown in Table 15.
The following relationship between the pins should be guaranteed in the application:
6.8
NOR Flash
The NOR Flash is connected to the EMI interface of CPU, two NOR Flash (U7,U10) are
available on the board, the bit-width is 32-bit, the current memory size is 128Mbit. The 32bit
NOR Flash is mapped to memory space of CPU, use Jumpers (JP1,JP2,JP3,JP4,JP5,JP6)
to select one of six memory space.
By default the memory space mapping of NOR Flash is selected as shown in Table 16
Table 15.
General ADC reference voltage settings
Jump
er
Description
Configuration
J27-1
J27-2
Connects the +2V5_ADC on-board ADC supply voltage
to the ADC_VREFP pin of the CPU board (Default)
Connects the external ADC application supply voltage to
the ADC_VREFP pin J27-1 of the CPU board
J27-19
J27-20
Connects the application board GND of the ADC supply
voltage domain to the ADC_VREFN pin of the CPU board
(Default)
Connects the external ADC application GND (lower limit)
supply voltage to the ADC_VREFN pin J27-19 of the
CPU board
0V
≤
J27-19
≤ J27-3-J27-17
≤
J27-1
≤
+2.5V
GND
≤ ADC_VREFN ≤
AIN0 -AIN7
≤ ADC_VREFP ≤
+2V5ADC
12
12
19 20
19 20
Table 16.
Memory space map jumpers of NOR Flash
Jumper
Description
Configuration
JP1
NOR Flash is mapped to EMI CSn0
memory space:
0x50000000
JP2
Nor Flash is mapped to EMI CSn1
memory space:
0x60000000
12
12



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