AN3422 datasheet(33/52 Pages) STMICROELECTRONICS

33 / 52 page

AN3422

Peripheral migration

Doc ID 018976 Rev 2

33/52

4.10

ADC

The table below presents the differences between the ADC interface of STM32F1 series

and STM32L1 series, these differences are the following:

●

New digital interface

●

New architecture and new features

Program mode

Half word

Program memory: word/ half

page

DATA EEPROM memory: byte /

half word / word / Double word

Read Protection

Unprotection

Read protection disable

RDP = 0xA55A

Level 0 no protection

RDP = 0xAA

Protection

Read protection enable

RDP != 0xA55A

Level 1 memory protection

RDP != (Level 2 & Level 0)

JTAG fuse

Level 2 RDP = 0xCC (2)

Write protection granularity

Protection by 4 Kbyte block

Protection by sector

User Option bytes

STOP

STANDBY

WDG

BOR level

BFB2

For more details refer to “EEPROM emulation in STM32F10x microcontrollers (AN2594)

Memory read protection Level 2 is an irreversible operation. When Level 2 is activated, the level of protection cannot be

decreased to Level 0 or Level 1.

Table 12.

FLASH differences between STM32F1 series and STM32L1 series (continued)

Feature

STM32F1 series

STM32L1 series

Color key:

= New feature or new architecture

= Same feature, but specification change or enhancement

= Feature not available (NA)

Table 13.

ADC differences between STM32F1 series and STM32L1 series

ADC

STM32F1 series

STM32L1 series

ADC Type

SAR structure

Instances

ADC1 / ADC2 / ADC3

ADC1

Max Sampling freq

1 MSPS

AN3422 bảng dữ liệu(PDF) 33 Page - STMicroelectronics

AN3422 bảng dữ liệu(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

bảng dữ liệu tải về

Link URL