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AN3137 bảng dữ liệu(PDF) 30 Page - STMicroelectronics

tên linh kiện AN3137
Giải thích chi tiết về linh kiện  Analog-to-digital converter on STM8L and STM8AL devices
PDF  42 Pages
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AN3137 bảng dữ liệu(HTML) 30 Page - STMicroelectronics

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Methods for precision improvement
AN3137
30/42
Doc ID 16983 Rev 3
If the internal sampling capacitor Csh is not charged to full voltage range (4096 level) before
sampling, you can calculate the Cext value replacing “4096” in the formula above.
Calculating with 4096 level gives precise measurement results also in the case of ADC input
channels switching (Csh was charged from different ADC input in the previous
measurement).
A side effect of this hardware workaround is the cyclical charging of Cext which must be
taken into account. Each ADC conversion transfers charge from Csh to Cext. One transfer
charges the Cext below 0.5 lsb, as described above, but more transfers can charge Cext to
larger values if it is not discharged between two conversions. Figure 17 shows an example
of this scenario where the ADC measurement is performed faster.
Figure 17.
Charging the external capacitor with too short time between conversions
Software change:
The side effect mentioned above can be solved by software. The objective is to create a
delay in order to let Cext discharge through Rin (not measure so often) giving a “discharge
time” between ADC conversions. The “discharge time” (tC) is equal to the transferred charge
from Csh to Cext (charging) and from Cext to Rin (discharging). The assumption is that Cext
>> Csh.
where Umax ..... 4096 lsb voltage level (worst case)
Q
ch
ing
arg
Q
sh
C
sh
U
max
⋅
==
Q
disch
ing
arg
U
lsb
R
in
-----------
e
t
R
in Cext
-------------------
–
t
d
0
t
C
∫
⋅
=



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