AN3137 datasheet(27/42 Pages) STMICROELECTRONICS

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AN3137

Methods for precision improvement

Doc ID 16983 Rev 3

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Figure 13.

Noise observed on ADC input pin during ADC conversions

4.4.2

Explanation of the behavior

The explanation of this added pin noise and added measurement error (in case a signal

source with high internal impedance is used) comes from the internal ADC structure: its

input sampling circuit.

Figure 14 shows a simplified schematic of the input stage (sample and hold circuit).

Figure 14.

ADC simplified schematic of input stage - sample and hold circuit

The spikes (noise) present on ADC input pin during conversions are related to the sampling

switch (S1). If the switch is closed, some charge (coming from the sample and hold

capacitor Csh or caused by another effect) is transferred to the input pin. Then this charge

starts discharging through the source impedance (Rin). The discharge process ends at the

end of the sampling time (tS) when the switch S1 is opened. The remaining undischarged

voltage remains on the capacitor Csh and ADC measures this voltage. If the sampling time

(tS) is too short, the remaining voltage does not drop under 0.5 lsb and ADC measurement

shows an added error. Figure 15 shows this process.

ADC input signal during

conversion: an ADC noise is

injected to the input.

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