AN2633 datasheet(12/48 Pages) STMICROELECTRONICS

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Power supply and clocks

AN2633

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This allows you to dynamically control the number of peripherals that are running which

allows you to optimize the power used in a very flexible way.

The Idle mode gating mask register 0 (SCU_MGR0) and the Idle mode gating mask register

1 (SCU_MGR1) allow you to define a set of peripherals that are kept running when the

microcontroller goes into Idle mode. In Sleep mode, all peripherals except the RTC are

turned off.

Clock gating in emulation mode

During emulation mode (debug state of the ARM966E-S processor) the System Controller

allows gating the clock of a peripheral or a group of peripherals. The software application

can choose to stop the desired peripheral when ARM966E-S enters emulation mode. When

you clear the related bit in the Peripheral emulation clock gating register 0 (SCU_PECGR0),

or Peripheral emulation clock gating register 1 (SCU_PECGR1), the peripheral clock is

gated in emulation mode.

1.4

Power modes

The STR91xFA has configurable and flexible power management features that allow you to

choose the best power option to fit your application. You can dynamically manage the power

consumption or hardware to match the system's requirements. Power management is

provided via clock control to the CPU and individual peripherals. The STR91xFA supports

the following 4 global power control modes:

●

Normal Run mode

●

Special Interrupt Run mode

●

Idle mode

●

Sleep mode

Note:

In the application development environment, a special mode (Debug state) is active during

in circuit emulation (ICE). In this mode, the clocks are never switched off when the ICE is in

use even if the CPU enters Idle or Sleep mode. In Idle mode, the CPU stops fetching

instructions, but the ICE can override this state in order to run the debugger code. Using

Flash_PD_DBG bit in the Power management register (SCU_PWRMNG) you can configure

the Flash to enter power down mode when debug mode is active.

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