AN4149 datasheet(27/43 Pages) STMICROELECTRONICS

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AN4149

L4984D biasing circuitry

3.3

Mult divider and VFF

Pin 3 (MULT): the MULT pin is the second multiplier input. It will be connected, through a

resistive divider, to the rectified mains to get a sinusoidal voltage reference.

A complete illustration is given by the diagrams of Figure 13 and Figure 14 which show the

typical multiplier characteristics family. The linear operation of the multiplier is guaranteed

within the range 0 to 3 V of VMULT and the range 0 to 0.82 V (typ.) of Vcs, while the minimum

guaranteed value of the maximum slope of the characteristics family (typ.) is:

Equation 79

The voltage on the MULT pin is used also to derive the information on the RMS mains

voltage for the VFF compensation and the brownout function:

Pin 5 (VFF): the power stage gain of PFC pre-regulators varies with the square of the RMS

input voltage. This applies as well to the crossover frequency fc of the overall open-loop

gain because the gain has a single pole characteristic. This leads to large trade-offs in the

design. For example, setting the gain of the error amplifier to get fc = 20 Hz at 264 Vac

means having fc about 4 Hz at 88 Vac, resulting in sluggish control dynamics. Additionally,

the slow control loop causes large transient current flow during rapid line or load changes

that are limited by the dynamics of the multiplier output. This limit is considered when

selecting the sense resistor to let the full load power pass under minimum line voltage

conditions, with some margin. But a fixed current limit allows excessive power input at high

line, whereas a fixed power limit requires the current limit to vary inversely with the line

voltage.

Voltage feed-forward can compensate for the gain variation with the line voltage and allow

overcoming all of the above-mentioned issues. It consists of deriving a voltage proportional

to the input RMS voltage, feeding this voltage into a squarer/divider circuit (1/V2 corrector)

and providing the resulting signal to the multiplier that generates the current reference for

the inner current control loop.

Figure 13. Multiplier characteristics

family for VFF = 1 V

Figure 14. Multiplier characteristics

family for VFF = 3 V

AM13313v1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.1

VMULT (V)

2.6 V

Upper voltage clamp

3.0 V

3.5 V

4.0 V

4.5 V

5.0 V

5.5 V

VCOMP

AM13314v1

100

150

200

250

300

350

400

450

500

0.5

1.5

2.5

3.5

VMULT (V)

2.6 V

3.5 V

4.0 V

4.5 V

3.0 V

5.0 V

5.5 V

VCOMP

Upper Voltage

VFF = 3 V

MULT

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