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AN4149 bảng dữ liệu(PDF) 20 Page - STMicroelectronics

tên linh kiện AN4149
Giải thích chi tiết về linh kiện  Designing a CCM PFC pre-regulator based on the L4984D
PDF  43 Pages
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AN4149 bảng dữ liệu(HTML) 20 Page - STMicroelectronics

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Designing a CCM FOT-controlled PFC
AN4149
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DocID023523 Rev 2
The exact value of the MOSFET's COSS is indicated in the datasheet looking at the graph
representing COSS vs. VDS. At VDS equal to 400 V, COSS is 40 pF. This value should be
multiplied by two as two MOSFETs have been used in parallel, and adding a rough 100pF of
all other contributions, CD can be found:
Equation 56
Then the average rising time of the drain voltage is:
Equation 57
However, the average falling time depends on the driving current IG (limited by the resistor
placed on the gate), the MOSFET's total gate charge QG and the driving voltage Vdr,
supposed here equal to VCC (for example, 15 V) applied for simplicity. In the resistor
calculation the intrinsic gate resistance should also be considered. In the case of the
STF21N65M5, RG is 2.5 Ω which has to be added to the externally placed resistor RGext
(3.3
Ω in this design).
Equation 58
Finally, the MOSFET’s switching losses can be estimated with equation 55:
Equation 59
To estimate the capacitive losses, that is, the losses due to the discharge of the total drain
capacitance through the MOSFET at turn-on, this simple expression can be considered:
Equation 60
pF
pF
pF
C
C
C
stray
OSS
D
180
100
40
2
2
=
+
⋅
=
+
⋅
=
ns
IL
V
C
I
V
C
t
pk
DS
D
D
DS
D
rise
17
1
0
max
≈
⋅
⋅
=
⋅
=
π
π
ns
V
nC
R
R
V
Q
I
Q
t
G
Gext
dr
G
G
G
Cfall
19
5
.
2
3
.
3
15
50
≈
Ω
+
Ω
=
+
=
=
()
()
W
kHz
ns
ns
A
V
V
P
SW
2
.
2
70
19
17
36
.
4
400
2
1
90
=
⋅
+
⋅
⋅
⋅
=
)
(
2
1
)
(
2
VAC
f
V
C
VAC
P
sw
DS
D
cap
⋅
⋅
⋅
=
()
W
kHz
V
pF
V
P
cap
1
70
400
180
2
1
)
90
(
2
=
⋅
⋅
⋅
=



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