UPD30500 datasheet(12/36 Pages) NEC

12 / 36 page

µPD30500, 30500A, 30500B

Data Sheet U12031EJ4V0DS00

Pin Name

I/O

Function

Int (0:5)

Input

Interrupt.

General-purpose processor interrupt requests whose input statuses can be confirmed by

bits 15 through 10 of cause register.

NMI

Input

Non-maskable interrupt.

Interrupt request that cannot be masked.

ColdReset

Input

Cold reset.

Signal initializing the internal status of the processor. Inactivate this signal in synchroniza-

tion with SysClock.

Reset

Input

Reset.

Signal generating a reset exception, without initializing the internal status of the processor.

Inactivate this signal in synchronization with SysClock.

SysClock

Input

System clock.

Clock input signal to processor.

BigEndian

Input

Endian mode setting.

This signal sets the endian mode of the system interface.

When setting the endian mode with this signal, specify little endian with the data from the

ModeIn pin that is input at reset.

To set the endian mode with the data from the ModeIn pin, fix this signal to 0.

BigEndian

Bit 8 of boot mode

Mode

—

Big endian

Little endian

ModeClock

Output

Boot mode clock.

Successive boot mode data clock output resulting from dividing SysClock by 256.

Modeln

Input

Boot mode data input.

Input of initialization bit stream.

VDDOk

Input

VDD and VDDIONote1 are valid.

Signal indicating that the voltage supplied to the VR5000 is reached to the rated levelNote2

for 100 ms or more, and that that status is stabilized. When VDDOk is asserted active, the

VR5000 starts an initialization sequence.

VDDP

–

PLL VDD.

Power supply for internal PLL.

GNDP

–

PLL GND.

Ground for internal PLL.

VDD

–• VR5000

Positive power supply pin (3.3 V)

• VR5000A

Power supply pin for core (2.5 V)

• VR5000B

Power supply pin for core (1.8 V)

VDDIONote1

–

Power supply pin for I/O (3.3 V)

GND

–

Ground pin.

Notes 1. VDDIO is only for VR5000A and VR5000B.

2. VR5000: VDD = 3.135 V

VR5000A: VDD = 2.375 V, VDDIO = 3.135 V

VR5000B: VDD = 1.7 V, VDDIO = 3.135 V

UPD30500 bảng dữ liệu(PDF) 12 Page - NEC

UPD30500 bảng dữ liệu(HTML) 12 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

bảng dữ liệu tải về

Link URL