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AN2839 bảng dữ liệu(PDF) 4 Page - STMicroelectronics |
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AN2839 bảng dữ liệu(HTML) 4 Page - STMicroelectronics |
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4 / 40 page ![]() Designing an application with L6228 AN2839 4/40 Doc ID 15104 Rev 1 1 Designing an application with L6228 1.1 Current ratings With MOSFET (DMOS) devices, unlike bipolar transistors, the current under short-circuit conditions is, at a first approximation, limited by the RDS(on) of the DMOS themselves and can reach very high values. The L6228’s OUT pins and the two VSA and VSB pins are rated for a maximum of 1.4 Arms and 2.8 A peak (typical values), corresponding to a total of 2.8 Arms (5.6 A peak) for the whole IC. These values are meant to avoid damaging the metal structures, including the metallization on the die and bond wires. In practical applications, however, the maximum-allowable current is less than these values, due to power dissipation limits (see Section 1.13). The device has a built-in overcurrent detection (OCD) that provides protection against short-circuits between the outputs and between an output and ground (see Section 1.12). 1.2 Voltage ratings and operating range The L6228 requires a single supply voltage (VS) for the motor supply. Internal voltage regulators provide the 5 and 10 volts required for the internal circuitry. The operating range for VS is 8 to 52 V. To prevent the device from operating at an insufficient supply voltage, an undervoltage lockout (UVLO) circuit shuts down the device when the supply voltage falls below 5.5 V; to resume normal operating conditions, VS must then exceed 6.3 V. The hysteresis is provided to avoid false intervention of the UVLO function during fast VS ringings. It should be noted, however, that the DMOS' RDS(on) is a function of the VS supply voltage. In fact, when VS is less than 10 V, RDS(on) is adversely affected, and this is particularly true for the high-side DMOS’s that are driven from the VBOOT supply. This supply is obtained through a charge pump from the internal 10 V supply, which will tend to reduce its output voltage when VS goes below 10 V. Figure 2 shows the supply voltage of the high- side gate drivers (VBOOT - VS) versus the supply voltage (VS). Figure 2. Supply voltage of high-side gate drivers versus supply voltage Note that VS must be connected to both VSA and VSB since the bootstrap voltage (at the VBOOT pin) is the same for the two H-bridges. The integrated DMOS’s have a rated drain- source breakdown voltage of 60 V. However, VS should be kept below 52 V, since in normal working conditions the DMOS’s see a Vds voltage that will exceed the VS supply. In particular, when using the fast-decay mode, at the beginning of the off time (when all the DMOS’s are off during dead time) the SENSE pin sees a negative spike due to a non- negligible parasitic inductance of the PCB path from the pin to GND. |
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