HDM8513 datasheet(62/67 Pages) HYNIX

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A2. False Lock Escape Application Note

A QPSK signal will have inherent false lock states at frequency offsets of + or - n/4 of the symbol

rate. Most DBS signals which have symbol rates of 20M symbols-per-second or higher will not

experience false lock because the carrier frequency uncertainty is less than 1/4 of the symbol rate.

The HDM8513A is designed to process low data rate signals which may experience false lock,

particularly at high signal-to-noise ratio conditions. The HDM8513A will permit recovery from false

lock with some added host processor interaction. Specifically, the processor must initialize the

internal carrier frequency search hardware to search over a carrier frequency range of 1/4 of the

symbol rate. If QPSK lock is achieved, but no Viterbi lock is achieved, the processor would

assume this is a false carrier lock, then program the HDM8513A to search another carrier

frequency range covering 1/4 of the symbol rate. When both QPSK lock and Viterbi lock have

been achieved, the search is completed. This technique is reliable because the HDM8513A

utilizes a fixed frequency clock which is not subject to inaccuracy associated with analog VCOs.

This accuracy insures that the multiple search ranges are perfectly continuous with respect to

each other with no overlap.

HDM8513 bảng dữ liệu(PDF) 62 Page - Hynix Semiconductor