GMS87C1102 datasheet(57/89 Pages) HYNIX

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GMS81C1102 / GMS81C1202

Jan. 2002 ver 2.0

18. ANALOG TO DIGITAL CONVERTER

The analog-to-digital converter (A/D) allows conversion

of an analog input signal to a corresponding 8-bit digital

value. The A/D module has eight analog inputs, which are

multiplexed into one sample and hold. The output of the

sample and hold is the input into the converter, which gen-

erates the result via successive approximation.

The analog reference voltage is selected to VDD or AVref

by setting of the bit AVREFS in RBFUNC register. If ex-

ternal analog reference AVref is selected, the bit ANSEL0

should not be set to "1", because this pin is used to an ana-

log reference of A/D converter.

The A/D module has two registers which are the control

ADCM register, shown in Figure 18-2 , controls the oper-

ation of the A/D converter module. The port pins can be

configured as analog inputs or digital I/O.

To use analog inputs, each port is assigned analog input

port by setting the bit ANSEL[7:0] in RAFUNC register.

And selected the corresponding channel to be converted by

setting ADS[2:0].

The processing of conversion is start when the start bit

ADST is set to "1". After one cycle, it is cleared by hard-

ware. The register ADCR contains the results of the A/D

conversion. When the conversion is completed, the result

is loaded into the ADCR, the A/D conversion status bit

ADSF is set to "1", and the A/D interrupt flag ADIF is set.

The block diagram of the A/D module is shown in Figure

18-1. The A/D status bit ADSF is set automatically when

A/D conversion is completed, cleared when A/D conver-

sion is in process. The conversion time takes maximum 10

uS (at fxin=8 MHz).

Figure 18-1 A/D Converter Block Diagram

RB0/AN0/AVref

ANSEL0 ( RAFUNC.0 )

RA1/AN1

ANSEL1

RA2/AN2

ANSEL2

RA3/AN3

ANSEL3

RA4/AN4

ANSEL4

RA5/AN5

ANSEL5

RA6/AN6

ANSEL6

RA7/AN7

ANSEL7

000

001

010

011

100

101

110

111

VDD Pin

AVREFS ( RBFUNC.0 )

ADEN

S/H

Successive

Approximation

Circuit

A D IF

Resistor

Ladder

Circuit

ADS[2:0]

ADCR(8-bit)

Sample & Hold

A/D Interrupt

ADDRESS : EBH

RESET VALUE : Undefined

A/D Result Register

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