GMS81032 datasheet(61/101 Pages) HYNIX

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During counting-up, value of counter can be read. Timer execution is stopped by the

reset signal (RESET = ¡ÈL¡È)

(Note) in the process of reading 16-bit Timer Data, first read the upper 8-bit data. Then

read the lower 8-bit data, and read the upper 8-bit data again. If the earlier read upper

8-bit data are matched with the later read upper 8-bit data, read 16-bit data are correct.

If not, caution should be taken in the selection of upper 8-bit data.

Example)

1) Upper

8-bit

Read

2) Lower

8-bit

Read

3) Upper

8-bit

Read

¡é ¡é

4.2.3.1 Single/Modulo-N Mode

Timer0 (Timer1) can select initial (T0INIT, T1INIT of TM0, TM1) output level of Timer

Output port. If initial level is ¡ÈL¡È, Low-Data Register value of Timer Data Register is

transferred to comparator and T0OUT(T1OUT) is to be ¡ÈLow¡È, if initial level is

¡ÈHigh¡È, High -Data Register is transferred and to be ¡ÈHigh¡È. Single Mode can be

set by Mode Select bit(T0MOD, T1MOD) of Timer Mode Register (TM0, TM1) to ¡È1¡È

When used as Single Mode, Timer counts up and compares with value of Data Register.

If the result is same, Time Out interrupt occurs and level of Timer Output port toggle,

then counter stops as reset state. When used as Modulo-N Mode, T0MOD(T1MOD)

should be set ¡È0¡È. Counter counts up until the value of Data Register and occurs

Time-out interrupt. The level of Timer Output port toggle and repeats process of

counting the value which is selected in Data Register. During Modulo-N Mode, If

interrupt select bit(T0IFS, T1IFS) of Mode Register is ¡È0¡È, Interrupt occurs on every

Time-out. If it is ¡È1¡È, Interrupt occurs every second time-out.

(*note. Timer Output is toggled whenever time out happen)

0AFF 0B01

Chapter 4. Peripheral Hardware

GMS81032 bảng dữ liệu(PDF) 61 Page - Hynix Semiconductor