ML7344J datasheet(144/151 Pages) ETC2

144 / 151 page

FEDL7344C/E/J-04

ML7344C/E/J

144/151

BANK1 (continued)

Bit

Address

Symbol

(# test register)

Description

0x30

GFSK_DEV_H

GFSK frequency deviation setting (high 6 bits)

0x31

GFSK_DEV_L

GFSK frequency deviation setting (low byte)

0x32

FSK_DEV0_H/GFIL0

FSJ 1st frequency deviation setting (high 6 bits) /

Gaussian filter coefficient setting 0

0x33

FSK_DEV0_L/GFIL1

FSJ 1st frequency deviation setting (low byte) /

Gaussian filter coefficient setting 1

0x34

FSK_DEV1_H/GFIL2

FSJ 2nd frequency deviation setting (high 6 bits) /

Gaussian filter coefficient setting 2

0x35

FSK_DEV1_L/GFIL3

FSJ 2nd frequency deviation setting (low byte) /

Gaussian filter coefficient setting 3

0x36

FSK_DEV2_H/GFIL4

FSJ 3rd frequency deviation setting (high 6 bits) /

Gaussian filter coefficient setting 4

0x37

FSK_DEV2_L/GFIL5

FSJ 3rd frequency deviation setting (low byte) /

Gaussian filter coefficient setting 5

0x38

FSK_DEV3_H/GFIL6

FSJ 4th frequency deviation setting (high 6 bits) /

Gaussian filter coefficient setting 6

0x39

FSK_DEV3_L

FSJ 4th frequency deviation setting (low byte)

0x3A

FSK_DEV4_H

FSJ 5th frequency deviation setting (high 6 bits)

0x3B

FSK_DEV4_L

FSJ 5th frequency deviation setting (low byte)

0x3C

FSK_TIM_ADJ4

FSK 4th frequency deviation hold timing setting

0x3D

FSK_TIM_ADJ3

FSK 3rd frequency deviation hold timing setting

0x3E

FSK_TIM_ADJ2

FSK 2nd frequency deviation hold timing setting

0x3F

FSK_TIM_ADJ1

FSK 1st frequency deviation hold timing setting

0x40

FSK_TIM_ADJ0

FSK no-deviation frequency (carrier frequency) hold

timing setting

0x41-4C

Reserved

0x4D

VCO_CAL_MIN_I

VCO calibration low limit frequency setting

(I counter)

0x4E

VCO_CAL_MIN_FH

VCO calibration low limit frequency setting

(F counter high 4 bits)

0x4F

VCO_CAL_MIN_FM

VCO calibration low limit frequency setting

(F counter middle byte)

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