DAC5687IPZP datasheet(55/79 Pages) TI

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Digital Inputs

DA[15:0]

DB[15:0]

SLEEP

PHSTR

TXENABLE

QFLAG

SDIO

SCLK

SDENB

Internal

Digital In

IOVDD

IOGND

RESETB

Internal

Digital In

IOVDD

IOGND

S0027-01

Clock Inputs

CLK

Internal

Digital In

CLKC

CLKGND

10 k

Ω

CLKVDD

10 k

Ω

10 k

Ω

10 k

Ω

CLKVDD

S0028-01

DAC5687

SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006

QOUT(t) = (IIN(t)sin(2π × 0 × t + π/4) + 0 × cos(2π × 0 × t + π/4)) × 2

(1 – 1) = I

IN(t)sin(π/4) = IIN(t)/2

Applying the QMC gain of 1446, equivalent to 2½, increases the signal back to unity gain through the FMIX and

the QMC blocks.

Note that with this termination, the DAC side of the transformer is not 50-

Ω terminated and therefore may result

in reflections when used with a cable output.

Figure 63 shows a schematic of the equivalent CMOS digital inputs of the DAC5687. DA[15:0], DB[15:0], SLEEP,

PHSTR, TXENABLE, QFLAG, SDIO, SCLK, and SDENB have pulldown resistors and RESETB has a pullup

resistor internal to the DAC5687. See the specification table for logic thresholds. The pullup and pulldown

circuitry is approximately equivalent to 100 k

Ω.

Figure 63. CMOS/TTL Digital Equivalent Input

Figure 64 shows an equivalent circuit for the clock input.

Figure 64. Clock Input Equivalent Circuit

Figure 65, Figure 66, and Figure 67 show various input configurations for driving the differential clock input

(CLK/CLKC).

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