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AM79C974 bảng dữ liệu(PDF) 90 Page - Advanced Micro Devices |
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AM79C974 bảng dữ liệu(HTML) 90 Page - Advanced Micro Devices |
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90 / 153 page ![]() AMD P R E L I M I N A R Y 90 Am79C974 RST must be asserted low to start a NAND tree test se- quence. Initially, all NAND tree inputs except RST should be driven high. This will result in a high output at the BUSY pin. If the NAND tree inputs are driven low in the same order as they are connected to build the NAND tree, BUSY will toggle every time an additional input is driven low. BUSY will change to a ZERO, when INTA is driven low and all other NAND tree inputs stay high. BUSY will toggle back to high, when CLK is additionally driven low. BUSY will continue toggling as long as the NAND tree inputs are toggling in the sequence shown in Figure 28. BUSY will be high, when all NAND tree inputs are driven low. When testing is complete, deassert RST to exit this test mode. Note that some of the pins connected to the NAND tree are outputs in normal mode of operation. They must not be driven from an external source until the PCnet-SCSI controller is configured for NAND tree testing. 18681A-36 RST INTA CLK GNTB REQA AD[31:0] C/ BE[3:0] IDSELA FRAME IRDY TRDY DEVSEL STOP LOCK PERR SERR PAR FFFFFFFF 31 0000FFFF F 7 INTB GNTA REQB IDSELB BUSY PWDN Figure 28. NAND Tree Waveform |
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