AM79C974 datasheet(27/153 Pages) AMD

27 / 153 page

P R E L I M I N A R Y

AMD

Am79C974

DETAILED FUNCTIONS

Bus Interface Unit (BIU)

The bus interface unit is built of several state machines

that run synchronously to CLK. One bus interface unit

state machine handles accesses where the Am79C974

controller is the bus slave, and another handles ac-

cesses where the Am79C974 controller is the bus mas-

ter. All inputs are synchronously sampled. All outputs

are synchronously generated on the rising edge of CLK.

In the descriptions that follow,

GNT, REQ, INT, and

IDSEL are used to refer to the set of GNTA, REQA,

INTA, and IDSELA for the SCSI controller and to the set

GNTB, REQB, INTB, and IDSELB for the Ethernet

Controller, respectively.

Slave Configuration Transfers

The host can access the Am79C974 PCI configuration

space with a configuration read or write command. The

Am79C974 controller will assert

DEVSEL if the IDSEL

input is asserted during the address phase and if the ac-

cess is a configuration cycle.

DEVSEL is asserted two

clock cycles after the host has asserted

FRAME. All

configuration cycles are of fixed length. The Am79C974

controller will assert

TRDY on the 3rd clock of the

data phase.

Slave Configuration Read

The Slave Configuration Read command is used by the

host CPU to read the configuration space in the

Am79C974 controller. This provides the host CPU with

information concerning the device and its capabilities.

This is a single cycle, non-burst 8-bit, 16-bit, or 32-bit

transfer.

18681A-5

FRAME

CLK

IRDY

TRDY

123456

ADDR

DATA

1010

BE's

PAR

DEVSEL

IDSEL

STOP

Figure 1. Slave Configuration Read

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