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LM5039 bảng dữ liệu(PDF) 13 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  105V / 2A Half-Bridge Gate Drivers, Synchronous Rectifier Control Outputs with Programmable Delays
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LM5039
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SNVS621D – FEBRUARY 2010 – REVISED MARCH 2013
A small R-C filter connect to the CS pin and located near the controller is recommended to suppress noise. An
internal 36
Ω MOSFET connected to the CS input discharges the external current sense filter capacitor at the
conclusion of every cycle. The discharge MOSFET remains on for an additional 50 ns after the HO or LO driver
switches high to blank leading edge transients in the current sensing circuit. Discharging the CS pin filter each
cycle and blanking leading edge spikes reduces the filtering requirements and improves the current sense
response time.
Frequency Foldback
Ideally, a power converter will have the characteristics of a constant current source while operating in current
limit. In reality, the current limit level tends to increase as the output voltage decreases. In a hard-short condition,
avoiding an increase of the average output current requires extremely low duty cycles. However, the minimum
achievable on-time is limited due to propagation and turn-off delays. In a fixed frequency converter, the peak
output inductor current creeps up during the minimum on-time and does not have enough off-time to come back
down. Therefore, the average output current increases. The propagation delay of the LM5039 has been
optimized to about 50ns and the turn-off time mainly depends on the total gate charge of the external power FET.
To avoid the output current tail when the power converter is in average current limit, the LM5039 oscillator
frequency is proportionally decreased. In a hard-short condition, the oscillator frequency is reduced to 1/3rd the
oscillator frequency set by the RT resistor. The frequency foldback is implemented only in the average current
limit condition. and it does not affect the ac response of the control loop.
Overload Protection Timer
The LM5039 provides a current limit restart timer to disable the outputs and force a delayed restart (hiccup
mode) if a current limit condition is repeatedly sensed. The number of current limit events required to trigger the
restart is programmable by the external capacitor at the RES pin. During each PWM cycle, the LM5039 either
sources or sinks current from the RES pin capacitor. If no current limit is detected during a cycle, an 12 µA
discharge current sink is enabled to pull the RES pin to ground. If a current limit is detected, the 12 µA sink
current is disabled and a 22µA current source causes the voltage at the RES pin to gradually increase. The
LM5039 protects the converter with peak cycle-by-cycle and average current limiting while the voltage at RES pin
increases. If the RES voltage reaches the 2.5V threshold, the following restart sequence occurs:
The RES, ACL and SS capacitors are fully discharged
The soft-start current source is reduced from 110 µA to 1.2 µA
The SS capacitor voltage slowly increases. When the SS voltage reaches
≊1V, the PWM comparator will
produce the first narrow output pulse. After the first pulse occurs, the SS source current reverts to the normal
110 µA level. The SS voltage increases at its normal rate, gradually increasing the duty cycle of the output
drivers
If the overload condition persists after restart, peak cycle-by-cycle and average current limiting will begin to
increase the voltage on the RES capacitor again, repeating the hiccup mode sequence
If the overload condition no longer exists after restart, the RES pin will be held at ground by the 12 µA current
sink and normal operation resumes. Restart timer is initiated as the signal at CS pin crosses 500mV and
works the same if the controller is in average current limit mode or pure peak cycle-by-cycle current limiting.
The overload timer function is very versatile and can be configured for the following modes of protection:
1. Continuous Current limit only: The hiccup mode can be completely disabled by connecting a zero to 50
k
Ω resistor from the RES pin to AGND. In this configuration, the peak cycle-by-cycle/average current-limit
protection will limit the output current indefinitely and no hiccup sequences will occur.
2. Hiccup only: The timer can be configured for immediate activation of a hiccup sequence upon detection of
an overload by leaving the RES pin open circuit.
3. Delayed Hiccup: Connecting a capacitor to the RES pin provides a programmed interval of peak cycle-by-
cycle and average current limiting before initiating a hiccup mode restart, as previously described. The dual
advantages of this configuration are that a short term overload will not cause a hiccup mode restart but
during extended overload conditions, the average dissipation of the power converter will be very low.
4. Externally Controlled Hiccup: The RES pin can also be used as an input. By externally driving the pin to a
level greater than the 2.5V hiccup threshold, the controller will be forced into the delayed restart sequence.
For example, the external trigger for a delayed restart sequence could come from an over-temperature
protection circuit or an output over-voltage sensor.
Copyright © 2010–2013, Texas Instruments Incorporated
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