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ADP1046AACPZ-R7 bảng dữ liệu(PDF) 78 Page - Analog Devices |
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ADP1046AACPZ-R7 bảng dữ liệu(HTML) 78 Page - Analog Devices |
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78 / 88 page ![]() ADP1046A Data Sheet Rev. 0 | Page 78 of 88 Table 117. Register 0x7D—Light Load Mode Threshold Settings Bits Bit Name R/W Description [7:6] Reserved R/W Reserved. [5:4] Debounce R/W After the SR outputs are turned on or off, any further transition of the thresholds is ignored for the amount of time programmed in these bits. This debounce is provided to avoid false transitions and improve noise immunity. The debounce time is calculated as a number of PWM switching cycles (t SW). For example, at 100 kHz, tSW = 10 µs, 64 × tSW = 640 µs. Bit 5 Bit 4 Debounce Time 0 0 0 t SW 0 1 64 t SW 1 0 128 t SW 1 1 256 t SW [3:2] Light load mode averaging speed R/W These bits set the averaging speed and resolution used for the light load mode threshold. Faster speed corresponds to lower resolution and, therefore, to lower accuracy of the threshold. Bit 3 Bit 2 Speed (Resolution) 0 0 37.5 µs (6 bits) 0 1 75 µs (7 bits) 1 0 150 µs (8 bits) 1 1 300 µs (9 bits) [1:0] Light load mode hysteresis R/W These bits set the amount of hysteresis applied to the light load mode threshold. The size of the LSB is affected by the speed and resolution selected in Bits[3:2]. If the CS2 ADC range of 120 mV is used with 8-bit resolution, the LSB size is 120 mV/28 = 469 µV. Bit 1 Bit 0 Hysteresis (LSB) 0 0 3 0 1 8 1 0 12 1 1 16 Table 118. Register 0x7F—GO Byte Bits Bit Name R/W Description [7:4] Reserved R/W Reserved. 3 Filter GO W This bit latches all the filter registers: Register 0x60 to Register 0x67 and Register 0x71 to Register 0x75. 2 Frequency GO W This bit latches Register 0x3F and Register 0x40 to prevent the switching frequency settings from being temporarily incorrect. 1 PWM settings GO W This bit latches Register 0x41 to Register 0x5C to prevent the PWM settings from being temporarily incorrect. Note that Register 0x5C[1] is not gated by this bit (Register 0x7F[1]). A write to Register 0x5C[1] immediately switches the regulation point and frequency settings; however, the correct modulation limit and filter settings do not take effect until a subsequent frequency GO is executed using Register 0x7F[2]. For this reason, it is not recommended that the regulation point be changed on the fly using Register 0x5C[1]. 0 Voltage reference GO W This bit latches Register 0x31 to prevent the reference setting from being temporarily incorrect. |
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