| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
ADP1046AACPZ-R7 bảng dữ liệu(PDF) 58 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP1046AACPZ-R7 bảng dữ liệu(HTML) 58 Page - Analog Devices |
|
58 / 88 page ![]() ADP1046A Data Sheet Rev. 0 | Page 58 of 88 Table 47. Register 0x2F—OTP Threshold Bits Bit Name R/W Description [7:0] OTP threshold R/W This register, adding 0 as the MSB, results in a 9-bit OTP threshold value. This 9-bit value is compared to the nine MSBs of the RTD ADC reading. If the RTD ADC reading is lower than the threshold set by these bits, the OTP flag is set. This 8-bit register provides 256 threshold settings from 0 mV to 800 mV. One LSB equates to 800 mV/256 = 3.125 mV. Some of the threshold settings at the high and low ends of the range are not allowed. The OTP flag has a hysteresis of 16 mV. Bit 7 Bit 6 … Bit 3 Bit 2 Bit 1 Bit 0 OTP Limit (mV) 0 0 … 0 0 0 0 0 0 0 … 0 0 0 1 3.125 0 0 … 0 0 1 0 6.25 0 0 … 0 0 1 1 9.375 0 0 … 0 1 0 0 12.5 0 0 … 0 1 0 1 15.625 … … … … … … … … 1 1 … 1 0 0 1 778.125 1 1 … 1 0 1 0 781.25 … … … … … … … 1 1 … 1 1 1 1 796.875 Table 48. Register 0x30—OrFET Bits Bit Name R/W Description 7 OrFET enable delay R/W 0 = delay of 328 µs, equivalent to 9 bits of (VS1 − VS2) data. 1 = delay of 164 µs, equivalent to 8 bits of (VS1 − VS2) data. [6:5] OrFET enable threshold R/W These bits program the voltage difference between VS1 and VS2 before the OrFET is enabled. The VS1 and VS2 input pins are used to control the OrFET enable function. Bit 6 Bit 5 ADC Full-Scale Voltage Difference from VS1 to VS2 Range (%) V OUT = 12 V (mV) V OUT = 48 V (mV) 0 0 −2 −384 −1504 0 1 −1 −192 −752 1 0 −0.5 −96 −376 1 1 0 0 0 [4:2] Fast OrFET threshold R/W These bits program the threshold voltage difference between CS2+ and CS2− at which the OrFET is disabled. The CS2+ and CS2− input pins are used to control this function. The internal circuit is an analog comparator. Bit 4 Bit 3 Bit 2 Voltage Difference from CS2+ to CS2− (mV) 0 0 0 −3 0 0 1 −6 0 1 0 −9 0 1 1 −12 1 0 0 −15 1 0 1 −18 1 1 0 −21 1 1 1 −24 1 Fast OrFET debounce R/W These bits determine the debounce on the fast OrFET control before it disables the OrFET. 0 = 40 ns. 1 = 200 ns. 0 Fast OrFET bypass R/W Set this bit to completely bypass fast OrFET control. The action programmed for the OrFET flag is executed, unless the flag is programmed to be ignored. |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |