TUSB7320 datasheet(39/115 Pages) TI1

39 / 115 page

TUSB7320, TUSB7340

www.ti.com

SLLSE76J – MARCH 2011 – REVISED MAY 2012

Table 4-32. Power Management Capabilities Register Description (continued)

Device Specific Initialization. This bit returns 0 when read, indicating that

DSI

the TUSB73X0 does not require special initialization beyond the standard

PCI configuration header before a generic class driver is able to use it.

RSVD

Reserved. Returns zero when read.

PME_CLK

PME# Clock.

Power Mgmt Version. This field returns 3’b011 indicating Rev 1.2

2:0

PM_VERSION

compatibility.

4.25 Power Management Control/Status Register

This register determines and changes the current power state of the TUSB73X0.

PCI register offset: 44h

Default value: 0008h

Table 4-33. PCI Register 44h

Bit

No.

Reset

State

Table 4-34. Power Management Control/Status Register Description

Bit

Field Name

Access

Description

PME_STAT

PME# Status. This bit is sticky and is only reset by a Global Reset.

Data Scale. This 2-bit field returns 0’s when read since the TUSB73X0

14:13

DATA_SCALE

does not use the Data Register.

Data Select. This 4-bit field returns 0’s when read since the

12:9

DATA_SEL

TUSB73X0 does not use the Data Register.

PME_EN

PME# Enable. This bit is sticky and is only reset by a Global Reset.

7:4

RSVD

Reserved. Returns zero when read.

No Soft Reset. This bit returns ‘1’ indicating that no internal reset is

NO_SOFT_RESET

generated and the device retains its configuration context when

transitioning from the D3hot state to the D0 state.

RSVD

Reserved. Returns zero when read.

Power State. This 2-bit field is used both to determine the current

power state of the function and to set the function into a new power

1:0

PWR_STATE

state. This field is encoded as follows:00 = D001 = D110 = D211 =

D3hot.

4.26 Power Management Bridge Support Extension Register

This read-only register is not applicable to the TUSB73X0 and returns 00h when read.

PCI register offset: 46h

Default value: 00h

Table 4-35. PCI Register 46h

Bit No.

Reset State

CLASSIC PCI CONFIGURATION SPACE

Submit Documentation Feedback

Product Folder Link(s): TUSB7320 TUSB7340

TUSB7320 bảng dữ liệu(PDF) 39 Page - Texas Instruments

TUSB7320 bảng dữ liệu(HTML) 39 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL