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TFP410MPAPREP bảng dữ liệu(PDF) 22 Page - Texas Instruments |
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TFP410MPAPREP bảng dữ liệu(HTML) 22 Page - Texas Instruments |
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22 / 31 page ![]() TFP410-EP PanelBus ™ DIGITAL TRANSMITTER SGLS344A − JULY 2006 − REVISED MAY 2011 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 register descriptions (continued) DE_CNT Sub-Address = 37−36 Read/Write Default = 0x0000 7 6 5 4 3 2 1 0 DE_CNT[7:0] Reserved DE_CNT[10:8] These read/write registers define the width of the active display, in pixels, when the DE generator is enabled. The value must be less than or equal to (2047 − DE_DLY). DE_LIN Sub-Address = 39−38 Read/Write Default = 0x0000 7 6 5 4 3 2 1 0 DE_LIN[7:0] Reserved DE_LIN[10:8] These read/write registers define the height of the active display, in lines, when the DE generator is enabled. H_RES Sub-Address = 3B−3A Read Only 7 6 5 4 3 2 1 0 H_RES[7:0] Reserved H_RES[10:8] These read-only registers return the number of pixels between consecutive HSYNC pulses. V_RES Sub-Address = 3D−3C Read Only 7 6 5 4 3 2 1 0 V_RES[7:0] Reserved V_RES[10:8] These read-only registers return the number of lines between consecutive VSYNC pulses. I2C interface The I2C interface is used to access the internal TFP410 registers. This 2-pin interface consists of the SCL clock line and the SDA serial data line. The basic I2C access cycles are shown in Figure 10 and Figure 11. Start Condition (S) Stop Condition (P) SDA SCL Figure 10. I2C Start and Stop Conditions |
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