TFP410-EP

PanelBus

™ DIGITAL TRANSMITTER

SGLS344A − JULY 2006 − REVISED MAY 2011

18

POST OFFICE BOX 655303

register map (continued)

REGISTER

RW

SUB-

ADDRESS

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

VEN ID

R

00

VEN_ID[7:0]

VEN_ID

R

01

VEN_ID[15:8]

DEV ID

R

02

DEV_ID[7:0]

DEV_ID

R

03

DEV_ID[15:8]

REV_ID

R

04

REV_ID[7:0]

RESERVED

R

05-07

Reserved

CTL_1_MODE

RW

08

RSVD

TDIS

VEN

HEN

DSEL

BSEL

EDGE

PD

CTL_2_MODE

RW

09

VLOW

MSEL

TSEL

RSEN

HTPLG

MDI

CTL_3_MODE

RW

0A

DK

DKEN

CTL

RSVD

CFG

R

0B

CFG

RESERVED

RW

0C-31

Reserved

DE_DLY

RW

32

DE_DLY[7:0]

DE_CTL

RW

33

RSVD

DE_GEN

VS_POL

HS_POL

RSVD

DE_DLY[8]

DE_TOP

RW

34

RSVD

DE_DLY[6:0]

RESERVED

RW

35

Reserved

DE CNT

RW

36

DE_CNT[7:0]

DE_CNT

RW

37

Reserved

DE_CNT[10:8]

DE LIN

RW

38

DE_LIN[7:0]

DE_LIN

RW

39

Reserved

DE_LIN[10:8]

H RES

R

3A

H_RES[7:0]

H_RES

R

3B

Reserved

H_RES[10:8]

V RES

R

3C

V_RES[7:0]

V_RES

R

3D

Reserved

V_RES[10:8]

RESERVED

R

3E−FF

register descriptions

VEN_ID

Sub-Address = 01−00

Read Only

Default = 0x014C

7

6

5

4

3

2

1

0

VEN_ID[7:0]

VEN_ID[15:8]

These read-only registers contain the 16-bit TI vendor ID. VEN_ID is hardwired to 0x014C.

DEV_ID

Sub-Address = 03−02

Read Only

Default = 0x0410

7

6

5

4

3

2

1

0

DEV_ID[7:0]

DEV_ID[15:8]

These read-only registers contain the 16-bit device ID for the TFP410. DEV_ID is hardwired to 0x0410.

REV_ID

Sub-Address = 04

Read Only

Default = 0x00

7

6

5

4

3

2

1

0

REV_ID[7:0]

This read-only register contains the revision ID.