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MK30DX64VMB7 bảng dữ liệu(PDF) 14 Page - Freescale Semiconductor, Inc |
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MK30DX64VMB7 bảng dữ liệu(HTML) 14 Page - Freescale Semiconductor, Inc |
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14 / 72 page ![]() Table 5. Power mode transition operating behaviors Symbol Description Min. Max. Unit Notes tPOR After a POR event, amount of time from the point VDD reaches 1.71 V to execution of the first instruction across the operating temperature range of the chip. — 300 μs 1 • VLLS1 → RUN — 112 μs • VLLS2 → RUN — 74 μs • VLLS3 → RUN — 73 μs • LLS → RUN — 5.9 μs • VLPS → RUN — 5.8 μs • STOP → RUN — 4.2 μs 1. Normal boot (FTFL_OPT[LPBOOT]=1) 5.2.5 Power consumption operating behaviors Table 6. Power consumption operating behaviors Symbol Description Min. Typ. Max. Unit Notes IDDA Analog supply current — — See note mA 1 IDD_RUN Run mode current — all peripheral clocks disabled, code executing from flash • @ 1.8V • @ 3.0V — — 21.5 21.5 25 30 mA mA 2 IDD_RUN Run mode current — all peripheral clocks enabled, code executing from flash • @ 1.8V • @ 3.0V • @ 25°C • @ 125°C — — — 31 31 32 34 34 39 mA mA mA 3, 4 IDD_WAIT Wait mode high frequency current at 3.0 V — all peripheral clocks disabled — 12.5 — mA 2 IDD_WAIT Wait mode reduced frequency current at 3.0 V — all peripheral clocks disabled — 7.2 — mA 5 IDD_VLPR Very-low-power run mode current at 3.0 V — all peripheral clocks disabled — 0.996 — mA 6 Table continues on the next page... General K30 Sub-Family Data Sheet, Rev. 2, 4/2012. 14 Freescale Semiconductor, Inc. |
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