AFS090 datasheet(103/334 Pages) MICROSEMI

103 / 334 page

Fusion Family of Mixed Signal FPGAs

R e visio n 2

2 - 87

Direct Digital Input

The AV, AC, and AT pads can also be configured as high-voltage digital inputs (Figure 2-67). As these

pads are 12 V–tolerant, the digital input can also be up to 12 V. However, the frequency at which these

pads can operate is limited to 10 MHz.

To enable one of these analog input pads to operate as a digital input, its corresponding Digital Input

Enable (DENAxy) pin on the Analog Block must be pulled High, where x is either V, C, or T (for AV, AC,

or AT pads, respectively) and y is in the range 0 to 9, corresponding to the appropriate Analog Quad.

When the pad is configured as a digital input, the signal will come out of the Analog Block macro on the

appropriate DAxOUTy pin, where x represents the pad type (V for AV pad, C for AC pad, or T for AT pad)

and y represents the appropriate Analog Quad number. Example: If the AT pad in Analog Quad 5 is

configured as a digital input, it will come out on the DATOUT5 pin of the Analog Block macro.

Figure 2-67 • Analog Quad Direct Digital Input Configuration

Analog Quad

Voltage

Monitor Block

Current

Monitor Block

Digital

Input

Power

MOSFET

Gate Driver

Current

Monitor / Instr

Amplifier

Temperature

Monitor

Digital

Input

Digital

Input

Pads

To Analog MUX

To FPGA

(DAVOUTx)

To FPGA

(DACOUTx)

To FPGA

(DATOUTx)

On-Chip

Gate

Driver

Temperature

Monitor Block

Off-Chip

From FPGA

(GDONx)

Prescaler

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