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PIC24F08KL402 bảng dữ liệu(PDF) 23 Page - Microchip Technology |
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PIC24F08KL402 bảng dữ liệu(HTML) 23 Page - Microchip Technology |
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23 / 260 page ![]() 2011 Microchip Technology Inc. DS31037B-page 23 PIC24F16KL402 FAMILY 2.4 ICSP Pins The PGC and PGD pins are used for In-Circuit Serial Programming™ (ICSP™) and debugging purposes. It is recommended to keep the trace length between the ICSP connector and the ICSP pins on the device as short as possible. If the ICSP connector is expected to experience an ESD event, a series resistor is recom- mended, with the value in the range of a few tens of ohms, not to exceed 100Ω. Pull-up resistors, series diodes and capacitors on the PGC and PGD pins are not recommended as they will interfere with the programmer/debugger communica- tions to the device. If such discrete components are an application requirement, they should be removed from the circuit during programming and debugging. Alter- natively, refer to the AC/DC characteristics and timing requirements information in the respective device Flash programming specification for information on capacitive loading limits, and pin input voltage high (VIH) and input low (VIL) requirements. For device emulation, ensure that the “Communication Channel Select” (i.e., PGCx/PGDx pins), programmed into the device, matches the physical connections for the ICSP to the Microchip debugger/emulator tool. For more information on available Microchip development tools connection requirements, refer to Section 24.0 “Development Support” . 2.5 External Oscillator Pins Many microcontrollers have options for at least two oscillators: a high-frequency primary oscillator and a low-frequency secondary oscillator (refer to Section 9.0 “Oscillator Configuration” for details). The oscillator circuit should be placed on the same side of the board as the device. Place the oscillator circuit close to the respective oscillator pins with no more than 0.5 inch (12 mm) between the circuit components and the pins. The load capacitors should be placed next to the oscillator itself, on the same side of the board. Use a grounded copper pour around the oscillator cir- cuit to isolate it from surrounding circuits. The grounded copper pour should be routed directly to the MCU ground. Do not run any signal traces or power traces inside the ground pour. Also, if using a two-sided board, avoid any traces on the other side of the board where the crystal is placed. Layout suggestions are shown in Figure 2-3. In-line packages may be handled with a single-sided layout that completely encompasses the oscillator pins. With fine-pitch packages, it is not always possible to com- pletely surround the pins and components. A suitable solution is to tie the broken guard sections to a mirrored ground layer. In all cases, the guard trace(s) must be returned to ground. FIGURE 2-3: SUGGESTED PLACEMENT OF THE OSCILLATOR CIRCUIT In planning the application’s routing and I/O assign- ments, ensure that adjacent port pins and other signals, in close proximity to the oscillator, are benign (i.e., free of high frequencies, short rise and fall times, and other similar noise). GND ` ` ` OSC1 OSC2 T1OSO T1OS I Copper Pour Primary Oscillator Crystal Timer1 Oscillator Crystal DEVICE PINS Primary Oscillator C1 C2 T1 Oscillator: C1 T1 Oscillator: C2 (tied to ground) Single-Sided and In-Line Layouts: Fine-Pitch (Dual-Sided) Layouts: GND OSCO OSCI Bottom Layer Copper Pour Oscillator Crystal Top Layer Copper Pour C2 C1 DEVICE PINS (tied to ground) (tied to ground) |
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