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MPC5125 bảng dữ liệu(PDF) 85 Page - Freescale Semiconductor, Inc |
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MPC5125 bảng dữ liệu(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 94 page ![]() System Design Information MPC5125 Microcontroller Data Sheet, Rev. 4 Freescale Semiconductor 85 For a board with a COP (common on-chip processor) connector that accesses the JTAG interface and needs to reset the JTAG module, it is not recommended to wire only TRST and PORESET. To reset the MPC5125 via the COP connector, the HRESET pin of the COP should be connected to the HRESET pin of the MPC5125. The circuitry shown in Figure 51 allows the COP to assert HRESET or TRST separately, while any other board sources can drive PORESET. Table 49. COP/BDM Interface Signals BDM Pin # I/O Pin BDM Connector Internal Pullup/Pulldown External Pullup/Pulldown I/O1 NOTES: 1 With respect to the emulator tool’s perspective: Input is really an output from the embedded e300 core. Output is really an input to the core. 16 — GND — — — 15 CKSTP_OUT ckstp_out — 10 k Pullup I 14 — KEY — — — 13 HRESET hreset Pullup 10 k Pullup O 12 — GND — — — 11 SRESET sreset Pullup 10 k Pullup O 10 — N/C — — — 9 TMS tms Pullup 10 k Pullup O 8 CKSTP_IN ckstp_in — 10 k Pullup O 7 TCK tck Pullup 10 k Pullup O 6 — VDD2 2 From the board under test, power sense for chip power. —— — 5 See Note3 3 HALTED is not available from e300 core. halted3 —— I 4TRST trst Pullup 10 k Pullup O 3 TDI tdi Pullup 10 k Pullup O 2 See Notepci_frame qack4 —— O 1TDO tdo — — I |
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