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LH28F008SC bảng dữ liệu(PDF) 31 Page - Sharp Corporation

tên linh kiện LH28F008SC
Giải thích chi tiết về linh kiện  8M (1M 횞 8) Flash Memory
PDF  38 Pages
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nhà sản xuất  SHARP [Sharp Corporation]
Trang chủ  http://sharp-world.com/
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LH28F008SC bảng dữ liệu(HTML) 31 Page - Sharp Corporation

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8M (1M × 8) Flash Memory
LH28F008SC
31
ALTERNATIVE CE
  » - Controlled Writes1 (Continued)
VCC = 5 V ± 0.5 V, 5 V ± 0.25 V, TA = 0°C to +70°C
SYMBOL
PARAMETER
LH28F008SC-856
LH28F008SC-907
LH28F008SC-1207
UNIT
NOTE
MIN.
MAX.
MIN.
MAX.
MIN
.
MAX.
t
AVAV
Write Cycle Time
85
90
120
ns
t
PHEL
RP
» High Recovery to
CE
» Going Low
1
1
1
µs
2
t
WLEL
WE Setup to CE
»
Going Low
00
0
ns
t
ELEH
CE
» Pulse Width
50
50
50
ns
t
PHHEH
RP
» V
HH Setup to CE »
Going High
100
100
100
ns
2
t
VPEH
V
PP Setup to CE »
Going High
100
100
100
ns
2
t
AVEH
Address Setup to CE
»
Going High
40
40
40
ns
3
t
DVEH
Data Setup to CE
» Going High
40
40
40
ns
3
t
EHDX
Data Hold from CE
» High
55
5
ns
t
EHAX
Address Hold from CE
» High
55
5
ns
t
EHWH
WE Hold from CE
» High
00
0
ns
t
EHEL
CE
» Pulse Width High
25
25
25
ns
t
EHRL
CE
» High to RY»/BY» Going Low
90
90
90
ns
t
EHGL
Write Recovery before Read
0
0
0
µs
t
QVVL
V
PP Hold from Valid SRD,
RY
»/BY» High
0
0
0
ns
2, 4
t
QVPH
RP
» V
HH Hold from Valid SRD,
RY
»/BY» High
00
0
ns
2, 4
NOTES:
1. In systems where CE
  » defines the write pulse width (within a longer WE  » timing waveform), all setup, hold, and inactive WE  »
times should be measured relative to the CE
  » waveform.
2. Sampled, not 100% tested.
3. Refer to Command Definitions Table for valid AIN and DIN for block erase, byte write, or lock-bit configuration.
4. VPP should be held at VPPH1/2/3 (and if necessary RP  » should be held at VHH) until determination of block erase, byte write,
or lock-bit configuration success (SR.1/3/4/5 = 0).
5. See Ordering Information for device speeds (valid operational combinations).
6. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (High Seed Configuration)
for testing characteristics.
7. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (Standard Configuration)
for testing characteristics.



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