900844 datasheet(81/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

Figure 46. VIMG28 Detailed Internal Block Diagram

Main Features

• Uses 3.3 V or VPWR as the main power supply

• 225 mA maximum continuous output current

• Optimized for a 2.2 µF external filter capacitor with a maximum of 10 m

Ω ESR

• Uses internal pass FET

• The output for each LDO is monitored for over-current conditions and under-voltage events

VSDIO

VSDIO is a combo low drop-out (LDO) and power switch. It uses an external P-CH pass FET in Switch mode, and internal

pass FET on LDO mode.

VSDIO serves as an LDO when its output voltage is set to 1.8 V, and as a switch when its output voltage is set to 3.3 V. It

takes its input voltage directly from the 3.3 V output voltage node.

VSDIO supplies the SDIO card module. The card is initially powered up to 3.3 V. If the card is detected to be a low voltage

card, then the rail will be shutdown, configured as 1.8 V, and then turned on.

VSDIO will be actively discharged during shutdown.

Table 43. VIMG28 Control Register Structure and Bits Description

Name

Bits

Description

VIMGACNT (ADDR 0x0x48 - R/W - Default Value: 0x24)

CTLVIMGA

2:0

VIMG28 State Control

x0 = Reserved

x1 = Reserved

x2 = Reserved

x3 = Reserved

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

AOACCTLVIMGA

5:3

VIMG28 State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be

initialized by the system SPI controller after power up.

X0 = Do not copy

x1 = Do not copy

x2 = Do not copy

x3 = Do not copy

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

SELVIMGA

7:6

VIMG28 output voltage selections:

X0 = 1.5 V

x1 = 2.7 V

x2 = 2.8 V

x3 = 2.9 V

Controller

VOIMG 28

VOUTIMG28

Output Monitor

IOIMG28

SPI

Interface

COIMG 28

VOIMG28

CTLVIMG28

AOACCTLVIMG28

VIMG28CFAULT

VREF

Discharge

PVINIMG

(Shared with VIMG25)

GNDIMG

(Shared with VIMG25)

SELVIMG28

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