900844 datasheet(74/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

Figure 39. VYMXYFI18 Detailed Internal Block Diagram

Main Features

• Uses V21 or VPWR as the main power supply

• 200 mA maximum continuous output current

• Optimized for a 2.2 µF external filter capacitor with a maximum of 10 m

Ω ESR

• Uses an internal pass FET

• The output for each LDO is monitored for over-current conditions and under-voltage events

VCCPAOAC

VCCPAOAC is a low drop-out (LDO) fully integrated regulator with a P-CH Pass FET. It is high performance, low noise, and

high PSRR, with a low quiescent current and fast transient response. VCCPAOAC is actively discharged during shutdown.

VCCPAOAC shares an input voltage pin (PVIN1P5) and a reference ground pin (GND1P5) with VCCPDDR, VAON, VMM,

and the VCCP regulator. Each has independent control. PVIN1P5 is supplied from the V15 voltage.

Table 36. VYMXYFI18 Register Structure and Bits Description

Name

Bits

Description

VWYMXARFCNT (ADDR 0x4C - R/W - Default Value: 0x24)

CTLVWYMXARF

2:0

VYMXYFI18 State Control

x0 = Reserved

x1 = Reserved

x2 = Reserved

x3 = Reserved

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

AOACCTLVWYMXARF 5:3

VYMXYFI18 State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will

be initialized by the system SPI controller after power up.

X0 = Do not copy

x1 = Do not copy

x2 = Do not copy

x3 = Do not copy

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

Reserved

7:6

Reserved

Controller

VOYMXYFI 18

V21 or VPWR

PVINYMXYFI18

VOUTYMXYFI18

Output Monitor

IOYMXYFI 18

SPI

Interface

CINYMXYFI 18

COYMXYFI 18

VOYMXYFI 18

CTLVYMXYFI18

AOACCTLVYMXYFI 18

VYMXYFI18FAULT

VREF

GNDCOMMS1

Discharge

GNDCOMMS2

Two GND pins shared

between VYMXYFI18,

VYMXYFI , and VYMXGPS

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