900844 datasheet(72/118 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

900844

FUNCTIONAL DEVICE OPERATION

POWER SUPPLIES

Figure 37. VPNL18 Detailed Internal Block Diagram

Main Features

• Uses V21 as the main power supply

• 225 mA maximum continuous output current

• Optimized for a 2.2 µF external filter capacitor with a maximum of 10 m

Ω ESR

• Uses an internal pass FET

• The output for each LDO is monitored for over-current conditions and under-voltage events

VPMIC

VPMIC is a low drop-out (LDO) fully integrated regulator with a P-CH pass FET. It is high performance, low noise, and high

PSRR, with a low quiescent current and fast transient response. VPMIC is actively discharged during shutdown.

VPMIC shares an input voltage pin (PVIN2P1) and a reference ground pin (GND2P1) with VCC180 and VPNL18 regulators,

yet each has independent control. PVIN2P1 is supplied from the V21 voltage.

Table 34. VPNL18 Control Register Structure and Bits Description

Name

Bits

Description

VPANEL18CNT (ADDR 0x46 - R/W - Default value: 0x24)

CTLVPANEL18

2:0

VPNL18 State Control

x0 = Reserved

x1 = Reserved

x2 = Reserved

x3 = Reserved

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

AOACCTLVPANEL18

5:3

VPNL18 State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be

initialized by the system SPI controller after power up.

X0 = Do not copy

x1 = Do not copy

x2 = Do not copy

x3 = Do not copy

x4 = OFF

x5 = Low Power

x6 = Active

x7 = Active

Reserved

7:6

Reserved

Controller

VOPNL18

VOUTPNL18

Output Monitor

IOPNL18

SPI

Interface

COPNL18

VOPNL18

CTLVPNL18

AOACCTLVPNL18

VPNL18FAULT

VREF

Discharge

PVIN 2P1

(Shared with VCC180 and VPMIC)

GND2P1

(Shared with VCC180 and VPMIC)

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