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IMX28AEC bảng dữ liệu(PDF) 33 Page - Freescale Semiconductor, Inc

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Giải thích chi tiết về linh kiện  Processors Data Sheet for Automotive Products High assurance boot
PDF  72 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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IMX28AEC bảng dữ liệu(HTML) 33 Page - Freescale Semiconductor, Inc

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i.MX28 Applications Processors Data Sheet for Automotive Products, Rev. 1
Freescale Semiconductor
33
3.5.3.4
LPDDR1 Input AC Timing
Figure 8 and Table 38 show input AC timing for LPDDR1.
Figure 8. LPDDR1 Input AC Timing
3.5.4
Ethernet MAC Controller (ENET) Timing
The ENET is designed to support both 10- and 100-Mbps Ethernet networks compliant with IEEE 802.3.
An external transceiver interface and transceiver function are required to complete the interface to the
media. The ENET supports 10/100-Mbps MII (18 pins altogether), 10/100-Mbps RMII (10 pins, including
serial management interface), for connection to an external Ethernet transceiver. All signals are compatible
with transceivers operating at a voltage of 3.3 V.
The following subsections describe the timing for MII and RMII modes.
Table 38. DDR2 Input AC Timing
ID
Description
Symbol
Min
Max
Unit
DDR20
Positive DQS latching edge to associated CK edge
tDQSCK
2
6
ns
DDR21
DQS to DQ input skew
tDQSQ
0.25 tCK
–0.85
0.25 tCK
–0.5
ns
DDR22
DQS to DQ input hold time
tQH
0.25 tCK
+0.75
0.25 tCK
+ 1
ns
EMI_CLK
EMI_CLKN
EMI_DQS
DDR21
DDR22
d0
DDR20
d1
d2
d3
EMI_DQ
EMI_DQSN



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