CYWUSB6953_10 datasheet(2/68 Pages) CYPRESS

2 / 68 page

CYRF69103

Document #: 001-07611 Rev *F

Page 2 of 68

3. Contents

PRoC™ LP Features......................................................... 1

Logic Block Diagram........................................................ 1

Contents ............................................................................ 2

Applications ...................................................................... 3

Functional Description..................................................... 3

Functional Overview ......................................................... 3

2.4 GHz Radio Function .............................................. 3

Data Transmission Modes........................................... 3

Microcontroller Function .............................................. 3

Backward Compatibility ............................................... 4

DDR Mode................................................................... 4

SDR Mode.................................................................. 5

Pinouts .............................................................................. 6

Functional Block Overview.............................................. 7

2.4 GHz Radio............................................................. 7

Frequency Synthesizer................................................ 7

Baseband and Framer................................................. 7

Packet Buffers and Radio Configuration Registers ..... 8

Auto Transaction Sequencer (ATS) ............................ 8

Interrupts ..................................................................... 9

Clocks.......................................................................... 9

GPIO Interface ............................................................ 9

Power On Reset/Low Voltage Detect.......................... 9

Timers ......................................................................... 9

Power Management .................................................... 9

Low Noise Amplifier (LNA) and Received

Signal Strength Indication (RSSI) ............................... 11

SPI Interface.................................................................... 11

3-Wire SPI Interface .................................................. 11

4-Wire SPI Interface .................................................. 11

SPI Communication and Transactions ...................... 12

SPI I/O Voltage References ...................................... 12

SPI Connects to External Devices ............................ 12

CPU Architecture............................................................ 12

CPU Registers........................................................... 13

Flags Register ........................................................... 13

Accumulator Register ................................................ 13

Index Register ........................................................... 14

Stack Pointer Register............................................... 14

CPU Program Counter High Register ....................... 14

CPU Program Counter Low Register ........................ 14

Addressing Modes .......................................................... 15

Source Immediate ..................................................... 15

Source Direct ............................................................. 15

Source Indexed ......................................................... 15

Destination Direct ...................................................... 15

Destination Indexed................................................... 16

Destination Direct Source Immediate........................ 16

Destination Indexed Source Immediate ..................... 16

Destination Direct Source Direct ............................... 16

Source Indirect Post Increment ................................. 17

Destination Indirect Post Increment .......................... 17

Instruction Set Summary ............................................... 18

Memory Organization ................................................. 19

Flash Program Memory Organization ....................... 19

Data Memory Organization ....................................... 20

Flash.......................................................................... 20

SROM........................................................................ 20

SROM Function Descriptions .................................... 21

Clocking .......................................................................... 24

SROM Table Read Description ................................. 25

Clock Architecture Description .................................. 26

CPU Clock During Sleep Mode ................................. 30

Reset................................................................................. 31

Power On Reset ........................................................ 32

Watchdog Timer Reset.............................................. 32

Sleep Mode...................................................................... 32

Sleep Sequence ........................................................ 32

Low Power in Sleep Mode......................................... 33

Wakeup Sequence.................................................... 33

Low Voltage Detect Control........................................... 35

POR Compare State ................................................. 36

ECO Trim Register .................................................... 36

General Purpose I/O Ports............................................. 37

Port Data Registers ................................................... 37

GPIO Port Configuration ........................................... 38

GPIO Configurations for Low Power Mode ............... 43

Serial Peripheral Interface (SPI)................................ 44

SPI Data Register...................................................... 45

SPI Configure Register.............................................. 45

SPI Interface Pins...................................................... 47

Timer Registers .............................................................. 47

Registers ................................................................... 47

Interrupt Controller......................................................... 50

Architectural Description ............................................ 50

Interrupt Processing .................................................. 51

Interrupt Latency ....................................................... 51

Interrupt Registers..................................................... 51

Microcontroller Function Register Summary ............. 55

Radio Function Register Summary............................... 57

Absolute Maximum Ratings .......................................... 58

DC Characteristics (T = 25×C) ....................................... 58

AC Characteristics ........................................................ 60

RF Characteristics.......................................................... 64

Ordering Information...................................................... 66

Package Handling........................................................... 66

Package Diagram............................................................ 66

Document History Page ................................................. 67

Sales, Solutions, and Legal Information ...................... 68

Worldwide Sales and Design Support....................... 68

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