CYWUSB6953_10 datasheet(37/68 Pages) CYPRESS

37 / 68 page

CYRF69103

Document #: 001-07611 Rev *F

Page 37 of 68

19. General Purpose I/O Ports

The general purpose I/O ports are discussed in the following sections.

19.1 Port Data Registers

Table 19-1. P0 Data Register (P0DATA)[0x00] [R/W]

Bit #

Field

P0.7

Reserved

P0.4/INT2

P0.3/INT1

Reserved

P0.1

Reserved

Read/Write

R/W

Default

This register contains the data for Port 0. Writing to this register sets the bit values to be output on output enabled pins. Reading

from this register returns the current state of the Port 0 pins.

Bit 7

P0.7 Data

Bits 6:5

Reserved

Bits 4:3

P0.4–P0.3Data/INT2–INT1

In addition to their use as the P0.4–P0.3 GPIOs, these pins can also be used for the alternative functions as the

Interrupt pins (INT1–INT2). To configure the P0.4–P0.3 pins, refer to the P0.3/INT1–P0.4/INT2 Configuration

Bit 2

Reserved

Bit 1

P0.1 Data

Bit 0

Reserved

Table 19-2. P1 Data Register (P1DATA) [0x01] [R/W]

Bit #

Field

P1.7

P1.6

P1.5/SMOSI P1.4/SCLK

P1.3/SSEL

P1.2

P1.1

P1.0

Read/Write

R/W

Default

This register contains the data for Port 1. Writing to this register sets the bit values to be output on output enabled pins. Reading

from this register returns the current state of the Port 1 pins.

Bits 7

P1.7

Bits 6

P1.6 or alternate function of SMOSI in a 4-wire SPI

Bits 5:3

P1.5–P1.3 Data/3-wire SPI Pins (SMISO/SMOSI, SCLK, SSEL)

In addition to their use as the P1.6–P1.3 GPIOs, these pins can also be used for the alternative function as the

SPI interface pins. To configure the P1.6–P1.3 pins, refer to the P1.3–P1.6 Configuration Register (Table 19-10 on

page 41)

Bits 2:1

P1.2–P1.1

Bit 0

P1.0

Table 19-3. P2 Data Register (P2DATA) [0x02] [R/W]

Bit #

Field

Reserved

P2.1–P2.0

Read/Write

-R/W

R/W

Default

-0

This register contains the data for Port 2. Writing to this register sets the bit values to be output on output enabled pins. Reading

from this register returns the current state of the Port 2 pins.

Bits 7:2

P2 Data [7:2]

Bits 1:0

P2 Data [1:0]

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