PCA9620 datasheet(16/71 Pages) NXP

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PCA9620

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Product data sheet

Rev. 1 — 9 December 2010

16 of 71

NXP Semiconductors

PCA9620

Universal LCD driver for low multiplex rates

7.3.2 Recommended start-up sequences

This chapter describes how to proceed with the initialization of the chip in different

application modes.

(1) This time depends on the external capacitor on pin VLCD. For a capacitor of 100 nF a delay of 5 ms

to 15 ms is expected.

When using the internal VLCD generation, the display must not be enabled before the generation of

VLCD with the internal charge pump is completed, otherwise unwanted display artifacts may appear

on the display.

(2) RAM data may be written before or during the ramp-up of VLCD.

Fig 6.

Recommended start-up sequence when using the internal charge pump and the

internal clock signal

Wait 1 ms

START

Power-on

VDD1 and

VDD2 at the

same time

013aaa249

Set VPR

desired VLCD

value

Set

multiplication

factor for

charge pump

and enable it

Wait till

VLCD reaches

programmed

value(1)

Write RAM

content to be

displayed and

enable the

display(2)

STOP

Initiate an

OTP-refresh

Initialize

command

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