PCA9620 datasheet(41/71 Pages) NXP

41 / 71 page

PCA9620

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Product data sheet

Rev. 1 — 9 December 2010

41 of 71

NXP Semiconductors

PCA9620

Universal LCD driver for low multiplex rates

7.9.1 Data pointer

The addressing mechanism for the display RAM is realized using the data pointer. This

allows the loading of an individual display data byte, or a series of display data bytes into

any location of the display RAM. The sequence commences with the initialization of the

data pointer by the load-data-pointer command. Following this command, an arriving data

byte is stored starting at the display RAM address indicated by the data pointer.

The display RAM bitmap shows the direct relationship between the display RAM column and the

segment outputs, between the bits in a RAM row and the backplane outputs, and between the

RAM rows and banks.

Fig 30. Display RAM bitmap

display RAM columns/segment outputs (S)

display RAM rows/

backplane outputs

(BP)

013aaa262

columns

rows

bank 0

bank 1

bank 2

bank 3

bank 4

bank 5

bank 6

bank 7

bank 0

bank 2

bank 4

bank 6

bank 0

bank 4

static drive mode

multiplex 1:2 drive mode

multiplex 1:4 drive mode

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