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7549 bảng dữ liệu(PDF) 76 Page - Renesas Technology Corp |
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7549 bảng dữ liệu(HTML) 76 Page - Renesas Technology Corp |
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76 / 86 page ![]() Rev.2.02 Mar 31, 2009 Page 74 of 81 REJ03B0202-0202 7549 Group APPENDIX Note on Programming 1. Processor Status Register (1) Initialization of the processor status register It is required to initialize the processor status register (PS) flags which affect program execution. It is particularly essential to initialize the T and D flags because of their effect on calculations. Initialize these flags at the beginning of the program. <Reason> At a reset, the contents of the processor status register (PS) are undefined except for the I flag which is “1”. Fig. 86 Initialization of processor status register flags (2) How to refer the processor status register To refer the contents of the processor status register (PS), execute the PHP instruction once and then read the contents of (S+1). If necessary, execute the PLP instruction to return the stored PS to its original status. Fig 87. Stack memory contents after PHP instruction execution 2. Decimal Calculations (1) Instructions for decimal calculations To perform decimal calculations, set the decimal mode (D) flag to “1” with the SED instruction and execute the ADC or SBC instruction. In that case, after the ADC or SBC instruction, execute another instruction before the SEC, CLC, or CLD instruction. Fig 88. Instructions for decimal calculations (2) Status flag at decimal calculations When the ADC or SBC instruction is executed in decimal mode (D flag = “1”), three of the status flags (N, V, and Z) are disabled. The carry (C) flag is set to “1” if a carry is generated and is cleared to “0” if a borrow is generated as a result of a calculation, so it can be used to determine whether the calculation has generated a carry or borrow. Initialize the C flag before each calculation. 3. JMP Instruction When using the JMP instruction (indirect addressing mode), do not specify the address where “FF16” is allocated to the low- order 8 bits as the operand. 4. Multiplication and Division Instructions (1) The MUL and DIV instructions are not affected by the T and D flags. (2) Executing these instructions does not change the contents of the processor status register. Reset Initialize the flags Main program Stored PS (S) (S) + 1 Set the decimal mode (D) flag to “1” Execute the ADC or SBC instruction NOP Execute the SEC, CLC, or CLD instruction |
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