MAC7200 datasheet(189/976 Pages) FREESCALE

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Secured Expanded Mode

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

111

done from the external bus, with limited device functionality. In this mode, the following functionality is

available:

•

Debug functionality (EICE, Nexus and the JTAG interface) is enabled

•

External Bus Interface is enabled

•

Flash main array access is disabled

•

Shadow Block access is disabled

•

Boot from the External Bus

Table 9-9 shows the device memory map of the device in secured expanded mode after Reset. The memory

map for this mode differs from the memory map in Normal Single Chip Mode as follows:

•

The External Bus Interface is relocated to address $0000 0000

•

The Flash Main Array is not available

•

The Shadow Block is not available

After Reset, the memory map may be re-mapped using the AAMR register in the MCM module. The

allowed combinations are shown in Table 9-10. The Peripheral space is always fixed at $FC00 0000, and

is not re-mappable.

Table 9-9. Device Memory Map in Secured Expanded Mode (After Reset)1

1. This reset memory map equates to a reset value of $f0d0 0b09 in the AAMR register in the MCM module.

Address

Module

Size

(Bytes)

$0000 0000 - $3FFF FFFF

External Bus Interface

512M

$4000 0000 - $4000 7FFF

$4000 0000 - $4000 4FFF

SRAM2

2. The SRAM is mirrored across the entire 512MByte address range on a 32K boundary. Therefore, the first word

in SRAM may be read from or written to using address $4000 0000 or address $4000 8000 or address $4001

0000, etc.

32K

20K

$4000 8000 - $FBFF FFFF

Reserved

3008M

$FC00 0000 - $FFFF FFFF

Peripheral Bus modules

64M

Table 9-10. Allowed Memory Maps in Secured Expanded Mode

$0000 0000

$2000 0000

$4000 0000

AAMR Register

External Bus

SRAM

$f0d0 0b99

Unused

External Bus

SRAM

$f0d0 0b90

SRAM

External Bus

SRAM

$f0d0 0b9b

External Bus

Unused

SRAM

$f0d0 0b09

Unused

SRAM

$f0d0 0b00

SRAM

Unused

SRAM

$f0d0 0b0b

External Bus

SRAM

$f0d0 0bb9

Unused

SRAM

$f0d0 0bb0

SRAM

$f0d0 0bbb

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