MAC7200 datasheet(125/976 Pages) FREESCALE

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Detailed Signal Descriptions

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

4.3.37

PD[3] / XIRQ / NMI — Port D I/O Pin, High Priority Interrupt and

Non-maskable Interrupt

PD[3] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It is multiplexed with the high priority interrupt request input that provides a means of applying

asynchronous external interrupt requests. It can be configured to wake the system out of low-power mode

(DOZE) when an external signal is applied using the interrupt functionality. When the system is in NMI

mode, this pin is used exclusively for an external Non-Maskable Interrupt, and may not be used as a GPIO.

4.3.38

PD[4] / IRQ — Port D I/O Pin, and Maskable Interrupt

PD[4] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It is multiplexed with the low priority interrupt request input that provides a means of applying

asynchronous external interrupt requests. It can be configured to wake the system out of low-power mode

(DOZE) when an external signal is applied using the interrupt functionality.

4.3.39

PD[5:10] / ADDR[16:21] — Port D I/O Pins and External Address Bus

PD[5] to PD[10] are configurable general purpose input or output pins. They can be independently

configured to provide either high or reduced output drives, and also to enable or disable either a pull-up or

pull-down resistor on the pins. The pin is multiplexed with the external address bus lines Address 16 to

Address 21. Each pin can be independently configured to wake the system out of low-power mode (DOZE)

when an external signal is applied using the interrupt functionality.

4.3.40

PD[11] / OE — Port D I/O Pin and External Bus Control

PD[11] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It is multiplexed with the Output Enable output for devices connected to the external bus. It can be

configured to wake the system out of low-power mode (DOZE) when an external signal is applied using

the interrupt functionality.

4.3.41

PD[12] / Burst — Port D I/O Pin and External Bus Control

PD[12] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

pin. It is multiplexed with the Burst Attribute output for devices connected to the external bus. It can be

configured to wake the system out of low-power mode (DOZE) when an external signal is applied using

the interrupt functionality.

4.3.42

PD[13] / TA — Port D I/O Pin and External Bus Control

PD[13] is a configurable general purpose input or output pin. The pin can be configured to provide either

high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistors on the

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