MAC7200 datasheet(271/976 Pages) FREESCALE

271 / 976 page

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

193

Chapter 12

Enhanced DMA Controller (eDMA) Module

12.1

Overview of the MAC7200 Implementation

The MAC7200 family of devices implements a Direct Memory Access controller called the Enhanced

Direct Memory Access controller (eDMA). This module is implemented on other Freescale devices such

as those in the PPC5500 family. It enables transfer of data between the memory, peripherals and off-chip

devices with little intervention from the core, thus helping to increase system performance as well as

assisting with the simplification of software development.

12.1.1

eDMA Features

•

DMA transfers possible between system memories, SPIs, SCIs, I2C, ATD, eMIOS and General

Purpose I/Os

•

Programmable DMA Channel Mux allows assignment of any DMA source to any of the 16

available DMA channels.

•

All DMA transfers use dual address format.

•

Programmable Transfer Control Descriptor stored in local DMA memory.

•

Programmable Source and Destination address with configurable offset.

•

Independent 32-bit Minor and 16-bit Major loop counters for ’nested’ transfers.

•

Different final Source and Destination addresses allow circular Queue operation.

•

Programmable priority levels for each channel.

•

Bandwidth control for each channel.

•

Programmable transfer sizes through Major and Minor loop counters.

•

Independently Programmable read/write sizes.

•

Periodic triggering of up to 8 channels.

•

Round Robin channel prioritization

•

Scatter-Gather functionality

•

Inner Loop channel pre-emption

•

Channel to Channel linking

•

Software or Hardware start

•

Memory Map: 32-bit byte/half-word/word addressable peripheral

NOTE

The transfer type of all transfers done by the DMA is as follows:

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