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MAC7200 bảng dữ liệu(PDF) 222 Page - Freescale Semiconductor, Inc |
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MAC7200 bảng dữ liệu(HTML) 222 Page - Freescale Semiconductor, Inc |
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222 / 976 page ![]() External Signal Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 144 Freescale Semiconductor 11.9.3 Pin Protocol The protocol for the ARM7 processor transmitting messages via the auxiliary pins shall be accomplished with the MSEO pin(s) function (outlined in Table 11-15). MSEO is used to signal the end of variable-length packets, and not fixed length packets. MSEO is sampled on the rising edge of the message clock (MCKO). TCK I The Test Clock (TCK) input pin is used to synchronize the test logic, and control register access through the JTAG port. TRST I The optional Test Reset (TRST) input pin is used to asynchronously initialize the JTAG controller. The TRST pin has an internal pull-up resistor. Table 11-14. A7S Nexus3 Auxiliary Pins Auxiliary Pins Input/ Output Description of Auxiliary Pins MCKO O Message Clock Out (MCKO) is a Nexus generated output clock to development tools for timing of MDO & MSEO pin functions. MCKO is programmable through the DC Register. MDO[N:0] O Message Data Out (MDO[N:0]) are output pins used for OTM and BTM. External latching of MDO shall occur on rising edge of the Nexus3 message clock (MCKO). MSEO[1:0] O Message Start/End Out (MSEO) are output pins which indicate when a message on the MDO pins has started, when a variable length packet has ended, and when the message has ended. External latching of MSEO shall occur on rising edge of the Nexus3 clock (MCKO). One or two pin MSEO functionality is determined at integration time. RDY O Ready (RDY) is an output pin used to indicate to the external tool that the Nexus block is ready for the next Read/Write Access. If Nexus is enabled, this signal is asserted upon successful (without error) completion of an AHB transfer (Nexus read or write) & is held asserted until the JTAG state machine reaches the “Capture_DR” state. Upon exit from system reset or if Nexus is disabled, RDY remains de-asserted. EVTO O Event Out (EVTO) is an output which, when asserted, indicates one of two events has occurred based on the EOC bits in the DC Register. EVTO is held asserted for one (1) cycle of MCKO: 1) one of four watchpoints has occurred & EOC = 2'b00 2) debug mode was entered (DBGACK from ARM7) & EOC = 2'b01 EVTI I Event In (EVTI) is an input which, when asserted, will initiate one of two events based on the EIC bits in the DC Register (if the Nexus module is enabled at reset; see Section 11.1.3.3, “Disabled”): 1) Program Trace synchronization messages (provided Program Trace is enabled & EIC = 2'b00). 2) Debug request (EDBGRQ) to ARM7 EmbeddedICE module (provided EIC = 2'b01 and this feature is implemented). Table 11-13. JTAG Pins for A7S Nexus3 (Continued) JTAG Pins Input/ Output Description of JTAG Pins (included in ARM7 CPU) |
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