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12C508 bảng dữ liệu(PDF) 14 Page - Microchip Technology |
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12C508 bảng dữ liệu(HTML) 14 Page - Microchip Technology |
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14 / 113 page ![]() PIC12C5XX DS40139E-page 14 © 1999 Microchip Technology Inc. 4.2 Data Memory Organization Data memory is composed of registers, or bytes of RAM. Therefore, data memory for a device is specified by its register file. The register file is divided into two functional groups: special function registers and general purpose registers. The special function registers include the TMR0 register, the Program Counter (PC), the Status Register, the I/O registers (ports), and the File Select Register (FSR). In addition, special purpose registers are used to control the I/O port configuration and prescaler options. The general purpose registers are used for data and control information under command of the instructions. For the PIC12C508, PIC12C508A and PIC12CE518, the register file is composed of 7 special function registers and 25 general purpose registers (Figure 4- 2). For the PIC12C509, PIC12C509A, PIC12CR509A, and PIC12CE519 the register file is composed of 7 special function registers, 25 general purpose registers, and 16 general purpose registers that may be addressed using a banking scheme (Figure 4-3). 4.2.1 GENERAL PURPOSE REGISTER FILE The general purpose register file is accessed either directly or indirectly through the file select register FSR (Section 4.8). FIGURE 4-2: PIC12C508, PIC12C508A AND PIC12CE518 REGISTER FILE MAP File Address 00h 01h 02h 03h 04h 05h 06h 07h 1Fh INDF(1) TMR0 PCL STATUS FSR OSCCAL GPIO General Purpose Registers Note 1: Not a physical register. See Section 4.8 FIGURE 4-3: PIC12C509, PIC12C509A, PIC12CR509A AND PIC12CE519 REGISTER FILE MAP File Address 00h 01h 02h 03h 04h 05h 06h 07h 1Fh INDF(1) TMR0 PCL STATUS FSR OSCCAL GPIO 0Fh 10h Bank 0 Bank 1 3Fh 30h 20h 2Fh General Purpose Registers General Purpose Registers General Purpose Registers Addresses map back to addresses in Bank 0. Note 1: Not a physical register. See Section 4.8 FSR<6:5> 00 01 |
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