12C508 datasheet(35/113 Pages) MICROCHIP

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DS40139E-page 35

PIC12C5XX

8.0

SPECIAL FEATURES OF THE

CPU

What

sets

microcontroller

apart

from

other

processors are special circuits to deal with the needs

of real-time applications. The PIC12C5XX family of

microcontrollers has a host of such features intended

to maximize system reliability, minimize cost through

elimination of external components, provide power

saving operating modes and offer code protection.

These features are:

• Oscillator selection

• Reset

- Power-On Reset (POR)

-Device Reset Timer (DRT)

- Wake-up from SLEEP on pin change

• Watchdog Timer (WDT)

• SLEEP

• Code protection

• ID locations

• In-circuit Serial Programming

The PIC12C5XX has a Watchdog Timer which can be

shut off only through configuration bit WDTE. It runs

off of its own RC oscillator for added reliability. If using

XT or LP selectable oscillator options, there is always

an 18 ms (nominal) delay provided by the Device

Reset Timer (DRT), intended to keep the chip in reset

until the crystal oscillator is stable. If using INTRC or

EXTRC there is an 18 ms delay only on VDD power-up.

With this timer on-chip, most applications need no

external reset circuitry.

The SLEEP mode is designed to offer a very low

current power-down mode. The user can wake-up

from SLEEP through a change on input pins or

through a Watchdog Timer time-out. Several oscillator

options are also made available to allow the part to fit

the application, including an internal 4 MHz oscillator.

The EXTRC oscillator option saves system cost while

the

crystal

option

saves

power.

set

configuration bits are used to select various options.

8.1

Configuration Bits

The PIC12C5XX configuration word consists of 12

bits. Configuration bits can be programmed to select

various device configurations. Two bits are for the

selection of the oscillator type, one bit is the Watchdog

Timer enable bit, and one bit is the MCLR enable bit.

FIGURE 8-1:

CONFIGURATION WORD FOR PIC12C5XX

—

MCLRE

WDTE FOSC1 FOSC0

CONFIG

Address(1):FFFh

bit11

987

654

321

bit0

bit 11-5: Unimplemented

bit 4:

MCLRE: MCLR enable bit.

1 = MCLR pin enabled

0 = MCLR tied to VDD, (Internally)

bit 3:

CP: Code protection bit.

1 = Code protection off

0 = Code protection on

bit 2:

WDTE: Watchdog timer enable bit

1 = WDT enabled

0 = WDT disabled

bit 1-0:

FOSC1:FOSC0: Oscillator selection bits

11 = EXTRC - external RC oscillator

10 = INTRC - internal RC oscillator

01 = XT oscillator

00 = LP oscillator

Note 1:

Refer to the PIC12C5XX Programming Specifications to determine how to access the

configuration word. This register is not user addressable during device operation.

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